Lattice Semiconductor ProcessorPM, ispMACH 4000ZE Pico Development Kits

Lattice Semiconductor introduced the ProcessorPM Development Kit, the ispMACH 4000ZE Pico Development Kit, and eight new reference designs. Pricing for the ispMACH 4000ZE Pico Development Kit is $69 and the ProcessorPM Development Kit is $49. The kits are ideal for prototyping high volume, cost sensitive, low power, space constrained applications. With Lattice’s low-cost programmable logic solutions, designers can now introduce several versions of the same product with very short development cycles and make upgrades to existing products in the field with low risk.

ispMACH 4000ZE Pico Evaluation Board Features

  • Pre-programmed Pico Power Demo
  • ispMACH 4000ZE device (LC4256ZE-5MN144C)
  • Power Manager II device (ispPAC-POWR6AT6-01SN32I)
  • LCD panel
  • USB mini jack socket for power, JTAG programming, and I2C interface
  • 2X15 header for off-board expansion provides access to LC4256ZE GPIOs, POWR6AT6 VMON inputs, I2C, and JTAG chain
  • Push button for global reset
  • 4-bit DIP switch to user-defined inputs
  • 3.3V and 2.5V supply rails
  • Current and voltage sensor circuits
  • Battery or USB power source
  • RoHS-compliant packaging and process
  • Marked for CE, China RoHS Environmental-Friendly Use Period (EFUP) and Waste Electrical and Electronic Equipment (WEEE) Directives

The ispMACH 4000ZE Pico Development Kit is an easy-to-use, low-cost platform for evaluating and designing with ispMACH 4000ZE CPLDs. The kit is based on a 2.5″ x 2″ evaluation board that features the ispMACH 4256ZE device in a lead-free 144-pin csBGA package, a Power Manager II POWR6AT6 for power monitoring, LCD panel and an expansion header. The Pico evaluation board provides features to help evaluate the use of the ispMACH 4000ZE CPLD in the context of battery-powered, handheld application. CPLDs are ideal for glue logic, level shifting between signal standards and providing additional interfaces for I/O limited microprocessors. On-board power monitoring circuits with the POWR6AT6 device provide a convenient way to monitor power consumption of the CPLD. A USB cable programming interface allows modification of the CPLD programming from any PC host.

ProcessorPM Evaluation Board Features

  • Pre-Configured Processor Support Demo
  • ProcessorPM-POWR605
  • Power Manager II POWR6AT6
  • 3.3V, 2.5V, and 1.8V Supply Rails
  • LEDs
  • Slide Potentiometer
  • 2×14 Expansion Header
  • USB Mini Jack Socket (Program/Power)
  • 2 Push Buttons
  • 4-Bit DIP Switch
  • JTAG and I2C Header Landings
  • RoHS-compliant packaging and process

The ProcessorPM Development Kit is a versatile, ready-to-use hardware platform for evaluating and designing with ProcessorPM power management devices. The kit is based on a 2.5″ x 2″ evaluation board that features the ProcessorPM POWR605 device in a lead-free 24-pin QFN package, a Power Manager II POWR6AT6, evaluation circuits that emulate a power supply bus and processor interface, and an expansion header. The kit includes a preconfigured processor support demonstration design that will support hundreds of microprocessor, DSP, ASSP or ASIC power management scenarios. The demo integrates three key support functions for a processor: voltage supervisor, watchdog timer (WDT) and reset generator. The board is controlled with switches and push buttons. A slide potentiometer emulates brown-out conditions on a 2.5V supply rail. A pin header provides access to the voltage monitor inputs and digital IOs of the ProcessorPM device and the I2C and power supply margin/trim IOs of the POWR6AT6 device.

More information: Lattice Reference Designs