Lattice Semiconductor released their new ispLEVER(R) Classic design software. ispLEVER Classic supports all mature Lattice programmable devices including its GAL(R) and ispGAL(R) Simple PLDs (SPLDs); ispLSI(R), MACH(R), ispMACH(TM) and ispXPLD(R) Complex PLDs (CPLDs); ORCA(R), FPSC and ispXPGA(R) Field Programmable Gate Arrays (FPGAs); ispGDX(R) and ispGDX2(TM) crosspoint devices. A Windows-based version of the new software package can be downloaded for free.
The ispLEVER Classic design software includes a powerful set of software tools for all design tasks, including project management, HDL design entry, module/IP integration, place and route, timing analysis, in-system logic analysis and much more. The ispLEVER Classic design software includes everything necessary to take a project from concept through to a programmed device. Lattice also works closely with industry leaders Mentor Graphics(R) and Synplicity(R) to provide superior HDL synthesis and simulation solutions, fully integrated into the ispLEVER design flow.
Lattice’s Windows-based ispLEVER Classic design tool suite is available for download now at no charge from the Lattice website. UNIX and Linux versions of ispLEVER Classic design software on hard media will be available directly from Lattice. The downloadable Windows version consists of 5 modules. These include:
- Primary Module (Supporting CPLD, SPLD products)
- FPGA Module
- Precision(R) RTL Synthesis Module (from Lattice’s partner Mentor Graphics)
- Synplify(R) for Lattice Synthesis Module (from Lattice’s partner Synplicity)
- ispLEVER Classic Help and Documentation Module
For user convenience, ispLEVER Classic also will be included on CD-ROM with future releases of Lattice’s ispLEVER design tools. In the future, these standard ispLEVER software packages will provide support for all currently available Lattice 130nm and 90nm devices, including the LatticeEC(TM), LatticeECP(TM), LatticeXP(TM), LatticeECP2(TM), LatticeECP2M(TM), LatticeSC(TM) and MachXO(TM) device families.