PURESPEED Burst Mode Receiver FPGA Reference Design

Lattice’s PURESPEED is an I/O burst mode receiver FPGA reference design for gigabit passive optical networks. The reference design uses Lattice’s Adaptive Input Logic (AIL) block to rapidly establish stable clock to data timing relationships within the fast lock times specified in the GPON ITU-T G.984.1 specification, which requires the Optical Line Termination (OLT) to lock to incoming data within 50 bit times.

The Lattice BM reference design features the following:

  • Receive Frame Termination: Preamble detection and delimiter logic
  • Transmit Framer Encapsulation: Header Insertion
  • AIL Setup: ORCAstra GUI module with GPON settings

GPON is an important “first mile” access technology that allows carriers to offer enhanced broadband content to homes and businesses by leveraging fiber optic connections to the customer’s premises. In the upstream direction, the OLT receives data from the ONT (Optical Network Termination) in bursts, and so needs to quickly lock on to data as it is sent. Traditional Ethernet and SONET CDRs (Clock and Data Recovery) have inherently long lock times and latencies, making them difficult or impossible to use in the upstream direction. The Lattice BMR solution leverages the fast locking, low latency AIL circuitry in the industry-leading PURESPEED I/O to perform the data recovery, making it the smallest footprint and lowest power FPGA-based BMR solution available today.

» Lattice Announces GPON Burst Mode Receiver Reference Design
» Lattice GPON Burst Mode Receiver Reference Design