Altera Corporation (NASDAQ: ALTR) Stratix® III FPGAs has achieved DDR3 memory interface speeds in excess of 1067 Mbps. The result is a 33% advantage in memory performance over competing FPGA solutions. The higher memory bandwidth enables new communications, computing, and video processing applications that were either previously impossible or required doubling the number of memory banks. Altera’s Stratix III FPGA family is the industry’s only FPGA to demonstrate full compliance to the JESD79-3 JEDEC DDR3 SDRAM standard, including the performance-critical read/write-leveling specification for maximum system performance.
Stratix III FPGAs also features 29% lower power consumption and a 25% performance advantage, as compared to competing solutions, making the device family ideal for high-performance applications that require the lowest possible power.
Designed to address the benefits of DDR3 memory, Altera’s Stratix III family is the only FPGA in the industry to include read and write leveling, I/O delay for DQ de-skew, dynamic on-chip termination, and the use of a reconfigurable phase-locked loop (PLL) to compensate for voltage and temperature variations. Currently, Stratix III FPGAs are the only FPGAs designed for fully compliant DDR3 SDRAM DIMM support and the only FPGAs to exceed 533 MHz operation.
Altera® Stratix III FPGAs featuring DDR3 memory bandwidth capabilities of 533 MHz are available now.
More info: Altera Stratix III FPGA