Xilinx and Analog Devices have achieved JESD204B interoperability between Xilinx JESD204 LogiCORE IP in the Kintex-7 FPGA and the ADI AD9250 analog-to-digital high-speed data converter. The results confirm that off-the-shelf ADI JESD204B data converters and Xilinx FPGAs work together seamlessly. The interoperability means manufacturers can take advantage of JESD204B to accelerate time-to-market for their new products by shortening development time, reducing system test effort, and minimizing development issues.
The joint interoperability lab testing successfully validated JESD204B subclass 0 and subclass 1 (deterministic latency) functionality by running a comprehensive set of tests between the Xilinx Kintex-7 XC7K325T FPGA and ADI’s AD9250 device.
Xilinx JESD204 LogiCORE IP is the industry’s first JESD204B soft IP that supports continuous line rates from 1 Gb/s to 12.5 Gb/s on 1, 2, 3, 4, 5, 6, 7, or 8 lanes using GTX or GTH transceivers in Zynq-7000, Kintex-7 and Virtex-7 28nm devices and GTP transceivers in the 28nm Artix-7 FPGA family. Xilinx JESD204B IP can be configured as a transmitter or receiver and supports transceiver sharing between a transmitter and receiver link.
Transition to the high-speed transceiver based JESD204B standard opens up significant upsides for improving system performance in communications equipment. JESD204B offers manufacturers numerous advantages, including higher level system integration, deterministic latency capability, easier multi-channel synchronization, smaller and lower-cost device packages, reduced PCB complexity and cost, and better system modularization.
Developed by the JEDEC standards organization, the new JESD204B specification overcomes connectivity limitations between the logic device and the multiple data converter devices used in multi-mode wireless radios, wideband backhaul modems, ultrasound monitors and other high performance equipment. JESD204B eliminates the connectivity bottleneck, complexity and improves system performance while lowering cost.