Altera Stratix IV FPGAs passed the Interlaken Alliance’s device interoperability testing. Altera certified their FPGAs interface with third-party components using the Interlaken protocol. Stratix IV GT FPGAs passed interoperability testing at 6.25-Gbps line rates. According to Altera, their FPGA devices are the only Interlaken solution capable of supporting line rates of 10 Gbps. Device interoperability testing validates Stratix IV FPGAs for chip-to-chip Interlaken interface and ensures they can be quickly deployed as a turnkey solution for next-generation wireless and wireline infrastructure applications.
Altera passed interoperability testing using a Stratix IV GT FPGA development board along with Altera’s internally developed Interlaken intellectual property (IP) core. The IP core is fully compliant to the Interlaken Protocol Definition revision 1.2 and provides a cost-effective, risk-free solution that can be quickly implemented in the FPGA.
The Interlaken Alliance’s device interoperability test included five chip vendors testing the connectivity between their components using the Interlaken protocol. Altera successfully demonstrated interoperation with all the participating ASSP vendors’ solutions, including Cortina’s CS1999 and CS3477 device families and PMC-Sierra’s HyPHY 20G platform.
More info: Altera Interlaken Solutions