Lattice Semiconductor introduced a low cost programmable PCI Express-to-High Speed Serial (HSS) bridge for the CAP12-120, which is a Small Office Home Office (SOHO) Voice Over IP (VOIP) platform that runs on the Intel architecture. The bridge design has been implemented in the LatticeECP2M FPGA. The solution utilizes the LatticeECP2M’s low power, high-performance SERDES and a Lattice PCI Express Intellectual Property (IP) core.
The Lattice FPGA solution is used in the Intel CAP12-120 reference design, based on the Intel Celeron M 915GM processor and chipset. The Intel CAP12-120 is a proof-of-concept design for software-based IP-PBX/MSBG solutions that helps developers build a converged communications device for up to 120 seats quickly and cost effectively. The all-in-one-box solutions are capable of delivering a variety of services and can be scaled and modified easily in software to meet the requirements of different customer premises. The fully integrated platforms include all the necessary hardware and software components for building cost effective IP-PBX/MSG solutions, reducing the time, effort and development cost of these platforms.
The LatticeECP2M family is an ideal FPGA platform for implementation of high performance serial protocols such as PCI Express and Gigabit Ethernet. The Lattice PCI Express IP, combined with Lattice’s high-speed SERDES and the economical, low power, high-performance LatticeECP2M fabric, provides designers a platform for satisfying their high-performance bridging and co-processing needs. The flexibility of the LatticeECP2M fabric provides designers with a platform to develop a variety of applications while still meeting very aggressive cost targets.
More info: Lattice Semiconductor