eBook: At-Speed SPI Flash/EEPROM Programming Using FPGA and JTAG

At-Speed SPI Flash/EEPROM Programming Using FPGA and JTAG

ASSET InterTech published a new ebook about the pros and cons of several different methods for programming memory devices connected to the Serial Peripheral Interface (SPI) bus. Each method takes advantage of a Field Programmable Gate Array (FPGA) that is already on the board for functional purposes. The title of the technical article is At-Speed SPI Flash/EEPROM Programming Using FPGA and JTAG.

This eBook reveals the secrets of fast in-system programming of flash/EEPROM from a connected FPGA and describes your options.

At-Speed SPI Flash/EEPROM Programming eBook Topics

  • Boundary-Scan: the long or short chain
  • SPI Master Programming
  • SPI Master IP with FIFO memory
  • Programming through an FPGA

Designers and manufacturing engineers face challenges when it comes to programming flash and EEPROM memories that are already soldered to a circuit board. The software or firmware content of these memories often has not yet been completed when hardware prototypes are being validated and tested prior to volume manufacturing. As a result, the memories must be programmed and sometimes reprogrammed in-system and as quickly as possible, especially in manufacturing.

With the size of memory exploding — especially flash and EEPROM — the problems are: how to program it quickly and after it’s already soldered onto the board. And, of course, you don’t want to take a lot of time developing the programming algorithm.

Now, several different methods will crank up the programming speed to the maximum ‘at-speed’ of the board and cut down on the time to develop the algorithm that makes it happen.

More info: At-Speed SPI Flash/EEPROM Programming Using FPGA and JTAG