At the Intel Developer Forum ’08 (IDF), Altera Corporation (Nasdaq:ALTR) and XtremeData will be demonstrating an easy-to-use accelerator solution based on the MATLAB environment and the graphical block diagramming oriented Simulink interface. The solution allows Intel Xeon-based algorithm developers to develop, simulate and verify their Altera Stratix III FPGA-accelerated algorithms without having to understand hardware description languages. Target applications include image and signal processing, radar, FFT filters, FIR filters and frequency conversion. The demo showcases a polyphase filter example that splits a signal into sub-bands, a function that is sometimes used in radar, MPEG and other types of signal processing.
The push button solution is enabled by several interfaces and tools:
- Intel’s QuickAssist Technology
Interfaces the Intel Xeon operating system to the XtremeData accelerator module, which makes the development process easier for developers while enabling better end-products
- Altera’s DSP Builder
Is integrated with Simulink to enable optimization of the hundreds of DSP blocks in the FPGA for algorithm acceleration
- Altera’s SOPC Builder and Avalon Streaming interface/switch fabric
is used in the FPGA to integrate the data streaming in/out from Xeon memory to Simulink-generated logic blocks
- XtremeData’s Reference Design
Is used as a starting point for software and hardware designers to short cut overall development time
The solution is comprised of these software components, the XtremeData XD2000i[tm] Xeon In-Socket Accelerator[tm] (ISA) and standard CPU server hardware. The demonstration will be at the Altera/XtremeData booth #727 in the I/O and Application Acceleration Community. IDF will take in San Francisco, August 19-21, at Moscone Center West.
More info: Intel Developer Forum