Xilinx to Attend IBC2008

Xilinx’s (Nasdaq: XLNX) programmable logic solutions for enabling broadcast applications will be showcased at the International Broadcasting Convention (IBC) in Amsterdam, Netherlands from September 12 through 16. Xilinx will conduct live demonstrations of new solutions for video and audio connectivity, including: triple-rate support for SD/HD/3G-SDI, audio (de)embedding in HD-SDI, and video over IP; an advanced video development platform for PCI Express(R); and DVB-T/H modulation and IP encapsulation.

Triple-Rate SDI Connectivity
Demonstration of new triple-rate SDI reference designs supporting SD-SDI, HD-SDI and 3G-SDI on a single RocketIO(TM) transceiver pin. These designs are available as free of charge source code to broadcast equipment manufacturers, enabling them to get to market quickly and easily adapt to 1080p60 standards. Also available are a wide range of new designs supporting SDI, HD-SDI, Dual Link HD-SDI, 3G-SDI Levels A & B, and DVB-ASI, as well as conversion between standards.

Video over IP
Demonstration of broadcast-quality video over IP connectivity by converting DVB-ASI inputs to gigabit Ethernet IP outputs with a Xilinx(R) Virtex(R)-5 FPGA on the ML505 development platform. A second ML505 development platform bridges from IP inputs to ASI outputs. Each bridge is able to achieve full gigabit bandwidth on the IP link and handle up to eight channels of ASI. Packet recovery is demonstrated with the SMPTE 2002 (ProMPEG CoP3) FEC-compliant circuitry. Support for multicasting through IGMP v3 will be showcased for the first time at IBC2008. This system design highlights a low risk, scalable FPGA solution for easily incorporating video over IP interfaces into all kinds of broadcast equipment.

Advanced Video Development Platform (AVDP)
Demonstration of PCI Express-compliant cards based on Xilinx Virtex-5 LXT and SXT FPGAs. Developed by OmniTek, the platform enables a standard PC to support professional broadcast quality video processing, capable of streaming uncompressed video to and from the PC via 3G-SDI, Dual Link HD-SDI, HD-SDI, SDI and DVB-ASI connectivity. The AVDP includes source code IP at no extra cost for scaling, de-interlacing and combining video channels, as well as optimized and flexible interfaces to the embedded PCI Express core in the FPGA and high-speed external memory. The AVDP offers a quick, low-risk route from prototyping to production for any broadcast system design.

DVB-T/H Modulation and Video over IP Encapsulation
Demonstration by MindWay of intellectual property cores: a DVB-T/H modulator and a gigabit Ethernet VoIP bridge (with embedded DVB-ASI SerDes and full-hardware IP protocol stack). These cores, mapped over Spartan(R)-3 or Spartan-3A DSP FPGAs, demonstrate broadcast-quality transmission chains to commercial DVB and IPTV receivers. The combination of MindWay cores and Xilinx silicon offer a cost- effective way of providing high performance transmission solutions and reducing overall cost-per-channel for terrestrial, mobile and IPTV networks. MindWay also offers cores for DVB-S, DVB-C and ATSC modulation.

More info: IBC | Xilinx in Broadcast