Xilinx Virtex-5 FPGA Interoperates with DDR3 SDRAM

Xilinx (NASDAQ: XLNX) announced that its Virtex(TM)-5 FPGA devices are interoperable with 800 Mbps DDR3 SDRAM devices from leading memory suppliers. Hardware-proven interoperability with Virtex-5 devices provides customers with an early path to adopt DDR3 SDRAM technology with the industry’s only high-performance 65-nm FPGA family shipping in production.

Successful interoperability hardware tests were performed using devices from Micron Technology and Elpida Memory. The interoperability tests performed on the Virtex-5 LXT ML561 FPGA Advanced Memory Interfaces Tool Kit verified a DDR3 SDRAM controller and interface reference design that is scheduled to be made broadly available in September. The reference design leverages Virtex-5 FPGA features like the IODELAY, a programmable input and output delay block that ensures accuracy of read data capture and configurable write data signals to achieve 800 Mbps data rates and DDR3 SDRAM functional requirements.

The DDR3 SDRAM architecture, as an evolutionary step from DDR2 SDRAM, provides increased bandwidth, lower power consumption (1.5 V vs. 1.8 V power supply for DDR2 SDRAM), and improved IO signaling for better signal integrity to enable higher system performance. Xilinx gives designers the ability to begin their designs today by offering DDR3 SDRAM support in its Virtex-5 LXT ML561 FPGA Advanced Memory Interfaces Tool Kit.

The Virtex-5 LXT ML561 FPGA Advanced Memory Interfaces Tool Kit with DDR3 SDRAM interface is available today for US $5,995. The ML561 can also be used to evaluate DDR2 SDRAM, DDR SDRAM, QDR II SRAM and RLDRAM II interfaces. Complete DDR3 hardware proven reference design files are available for free download in September 2007.

More info:
» Xilinx Demonstrates Interoperability of Virtex-5 FPGA with DDR3 SDRAM
» Virtex-5 LXT ML561 Advanced Memory Interfaces Tool Kit