Lattice Semiconductor and Aptina will showcase a low cost, dual image sensor design at the Consumer Electronics Show (CES) in Las Vegas, January 10-13, 2012. The dual image sensor design helps ISP vendors to quickly offer multiple camera solutions for the consumer market. Lattice’s private hospitality meeting suite will be held in the Las Vegas Hilton, North Hall, 28th Floor, Suite 127.
Lattice’s and Aptina’s dual image sensor design uses two Aptina MT9M024/MT9M034, 720P image sensors and combines the image into a single bus on which an ISP (Image Signal Processor) can operate. The output stream can be used to implement 3D stereoscopic video or for other multi-camera applications. The design leverages the Aptina HiSPi (High speed Serial Pixel interface) bus of the MT9M024/MT9M034.
The low cost of the solution enables other consumer applications such as automotive black box drive recorders and surround view cameras. The low cost, low power Lattice MachXO2 PLD and a small SDRAM chip implement the necessary logic and frame buffering that enable the two image sensors to be merged into one ISP bus.
Two image sensors are needed for applications like 3D stereoscopic video, black box car driver recorder designs, accurate 3D analytics for security/surveillance and many other applications. Although todays Image Signal Processors (ISP) are capable of processing the data that two image sensors output, they do not often have the port configurations to support multiple sensors.
The Lattice MachXO2 used with an inexpensive LP SDRAM device can properly synchronize and merge two image sensors and output the data in a format than an ISP can accept. The MachXO2 receives the image data from both image sensors and by using the LP SDRAM as a frame buffer, the MachXO2 can output a combined image for the ISP to process. The MachXO2 dual sensor interface design can output two 720p images in a top / bottom format or a left / right configuration, depending on what format the ISP would like to accept the data in.