Xilinx’s 7 Series GTH transceiver has successfully completed testing for 10GBASE-KR LogiCORE IP core. The test was conducted at the University of New Hampshire InterOperability Laboratory. The test validated that the IP fully meets UNH-IOL’s receiver (Rx) and transmitter (Tx) electrical and protocol compliance tests for backplane applications. The 10GBASE-KR LogiCORE IP is currently available in the Vivado Design Suite.
Several devices and boards were used in the extensive compliance testing effort, including the Virtex-7 FPGA VC7215 board featuring the XC7VX690T-3FFG1927E device. The UNH-IOL validation means OEMs can develop high-performance network and data center solutions with 10 Gigabit or 40 Gigabit backplanes that conform to the IEEE Std 802.3 using Xilinx’s 10GBASE-KR LogiCORE IP and enable 40GBASE-KR4 LogiCORE IP on Virtex-7 XT and HT devices with GTH transceivers.
Xilinx 10GBASE-KR IP Core Features
- Designed to 10-Gigabit Ethernet specification IEEE 802.3-2008 clause 49, Forward Error Correction (FEC) clause 74, and Auto-Negotiation clause 73
- Optional Management Data Interface (MDIO) interface to manage PCS/PMA registers according to specification IEEE 802.3-2008 clause 45
- Available under the Xilinx Project Core License Agreement
- Supports LAN mode only
- SDR XGMII interface connects seamlessly to the Xilinx 10G Ethernet MAC
More info: Xilinx 10GBASE-KR IP Core