EVE has integrated the latest version of the Xilinx ISE Design Suite to ZeBu (for Zero Bugs) emulation platforms. EVE’s R&D team tested the ISE Design Suite 11.1 on large system-on-chip (SoC) and application specific integrated circuit (ASIC) designs. The team used designs of several billion transistors that required hundreds of interconnected Virtex devices to ensure a high degree of success when placing and routing high-density Xilinx field programmable gate arrays (FPGAs).
The integration of ISE Design Suite 11 into the ZeBu compiler significantly accelerates long compilation runs. Runtime dropped by as much as 2X, allowing more turns per day.
The ZeBu emulation platforms are used for SoC hardware verification and software development, to shorten time to tapeout, improve product quality and eliminate costly respins, while accelerating software development ahead of silicon. They leverage the same hardware, design models and engineering resources across the entire design cycle, making it cost effective for every design team.
More info: EVE (Emulation & Verification Engineering)