GateRocket CEO Dave Orecchio and CTO Chris Schalick will participate in tutorial and technical sessions on the issue of FPGA verification and debug at the FPGA Summit. Orecchio is hosting tutorial session T3B at 2:40 PM on Wednesday afternoon with experts from Mentor Graphics, GateRocket, Altera, Agilent Technologies and Xilinx. The FPGA Summit runs Dec. 9-11 in San Jose, Calif. FPGA verification and debug is the number-one issue that affects time-to-market of FPGA based products.
The FPGA Summit will focus on the latest hardware and design news in the FPGA world and includes three days of technical sessions and impressive keynote speakers. GateRocket’s Orecchio will participate in Wednesday’s (Dec. 10) Verification Tutorial and hold court as the Summit’s designated “Verification Expert” during Wednesday night’s reception. CTO Schalick will speak on the topic of Hardware Assisted Verification Wednesday afternoon.