Engineers can get an early look at Altera’s OpenCL (Open Computing Language) for FPGA solution through the FPGAs Early Access Program (EAP). As part of the EAP, designers can preview Altera’s OpenCL solution and receive access to an OpenCL for FPGA training course, collateral and technical demonstrations. The open computing standard simplifies FPGA development by enabling teams to design systems and algorithms in a high-level C-based framework when targeting FPGAs.
OpenCL is an open standard for writing programs that execute across heterogeneous platforms, including CPUs, GPUs and FPGAs. OpenCL provides designers a time-to-market advantage compared to traditional FPGA development flows that require designing in a lower-level HDL (hardware description language). With the EAP, engineers can see how OpenCL can simplify many of the time-consuming details of hardware design by allowing developers to operate in a C-based environment and automatically generate the FPGA implementation.
In addition to simplifying FPGA development, EAP customers will also discover how using OpenCL in an FPGA implementation provides dramatic system performance advantages. Combining an inherently parallel language with the massively parallel performance capabilities of FPGAs delivers significantly higher performance compared to alternate hardware architectures.
Engineers who join the OpenCL EAP will receive the latest information from Altera representatives on the OpenCL tool and how it works. Customers will also receive early access to product documentation and periodic information from Altera about the OpenCL program.
More info: Altera Corporation