FPGA News – 2007.11.19

Actel Rolls Out Libero Integrated Design Environment v8.1
Extending the company’s industry-leading solutions for saving power at the chip and system levels, Actel Corporation has rolled out its Libero(TM) Integrated Design Environment (IDE) with significant new features, such as power-driven layout, that enable designers to further optimize designs to reduce dynamic power consumption by as much as 30 percent for a typical design. With the advanced power analysis capabilities built into Libero’s SmartPower tool, the enhanced analysis environment is the first to give users a comprehensive understanding of power usage in all functional modes of the design. In addition, an innovative battery life estimation feature gives portable designers an accurate calculation of battery life based on their FPGA design power profile — a first for field-programmable gate array (FPGA) design tools.