FPGA News – 2007.11.05

Synplicity, Lattice Team on ESL Synthesis Flow for DSP Design
Synplicity, Inc. (NASDAQ:SYNP), a leading supplier of innovative IC design and verification solutions, and Lattice Semiconductor (NASDAQ: LSCC), a leading supplier of FPGAs, have expanded their relationship to include delivery of a highly optimized, non-proprietary ESL synthesis flow for DSP design. Synplicity’s Synplify® DSP software now supports the LatticeECP2M(TM) and LatticeXP2(TM) Field Programmable Gate Array (FPGA) devices, creating a powerful solution for DSP algorithm implementation in aerospace, wireless, telecom and digital multimedia applications.

Tensilica Rolls Out Diamond Standard 106Micro Processor Core
Tensilica®, Inc. unveiled the industry’s smallest licensable 32-bit processor core based on an industry-standard architecture. The new Diamond Standard 106Micro core takes up only 0.26 mm2 in a 130-nm G process and only 0.13 mm2 in a 90-nm G process, which makes it smaller than the ARM7 or Cortex-M3 cores, yet at 1.22 Dhrystone MIPS/MHz, it delivers higher performance than the ARM9E cores.

Xilinx, Thales Showcase Reconfigurable FPGA-Based Architecture
Xilinx, Inc. (Nasdaq: XLNX), the world’s leading provider of programmable chips, and leading defense aerospace and security contractor Thales announced they will demonstrate a partially reconfigurable FPGA-based single chip architecture in a SCA (Software Communication Architecture) compatible environment for military radios at the Software Defined Radio Technical Conference (SDR’07).

Tensilica Adds More Features to Diamond Standard Processor Cores
Tensilica®, Inc. announced that it has enhanced its successful Diamond Standard processor product line, the lowest-power, most area-efficient and highest-performance licensable cores on the market. The new second-generation Diamond Standard processors include several new features including additional multiplier and divider functional units, several hardware optimizations that lower memory power by up to 30 percent, and an optional bridge to AXI-based AMBA systems.