MathWorks rolled out version 3.3 of their EDA Simulator Link. The latest version features FPGA-in-the-loop (FIL) capabilities for Xilinx FPGA development boards. FIL enables engineers to verify their designs at hardware speeds while using Simulink as a system-level test bench. EDA Simulator Link v3.3 is available now with prices starting at $2000 (US list price).
EDA Simulator Link v3.3 Features
- Verify HDL implementations of MATLAB code and Simulink models using FPGA development boards for both Spartan and Virtex class devices (including the Virtex-6 ML605 development board)
- FPGA-based verification provides higher run-time performance than HDL simulators
- FPGA-based verification increases confidence that the algorithm will work in the real world
- Verify HDL implementations of MATLAB code and Simulink models using co-simulation with Mentor Graphics ModelSim, Mentor Graphics Questa, and Cadence Design Systems Incisive Enterprise Simulator
- Generate TLM 2.0 components for use in SystemC virtual prototyping environments
More info: MathWorks EDA Simulator Link