At two EDA industry events, GateRocket will describe best practices for reducing FPGA verification and debug times. The first presentation will take place at the EDA Tech Forum in Westborough, Massachusetts at 12:40 pm (Eastern) on Thursday, October 14, 2010. The second presentation will in the EDA Virtual Summit (as part of verification track) at 4 pm (Eastern) on Thursday, October 14, 2010. Both events are free with advance registration.
In the presentations, GateRocket will describe its Device Native approach to verification. Their approach extends the existing simulation environment in a way that enables engineers to detect bugs up-front in the design process that would otherwise slip through to system integration. The company’s RocketDrive is a hardware-based solution that accelerates simulation and debug of large FPGAs. It bridges the gap between the RTL and the FPGA, enabling silicon-accurate simulation because it integrates the target FPGA device into the simulator.
Date and Locations
EDA Tech Forum
Doubletree Westborough, Mass.
12:40pm (Eastern), Thursday, October 14th
EDA Virtual Summit (online)
4pm (Eastern), Thursday, October 14th (as part of verification track)
More information: GateRocket