MoSys rolled out their Bandwidth Engine FPGA Companion Kit and Characterization Kit. The Bandwidth Engine development kits enable system designers to evaluate Bandwidth Engine ICs and develop products on fully-functional hardware platforms.
The Bandwidth Engine FPGA Companion Kit and Characterization Kit help engineers to evaluate and develop code for next-generation networking systems that incorporate Bandwidth Engine ICs. Both development kits support connection of all 16 OIF CEI-11 compatible SerDes lanes that operate at up to 10.3125 Gbps and communicate with the host using the GigaChip Interface. The boards are available with either a test socket or with a Bandwidth Engine IC soldered onto the board.
The FPGA Companion Kit includes a MoSys Bandwidth Engine evaluation board with FCI AirMax VS connectors arranged in accordance to Interlaken Physical Interop Recommendations, which allow for integration with standard FPGA 100G development kits.
The Characterization Kit contains a board populated with SMA connectors to interface to any suitable FPGA or ASIC development system purpose of SerDes evaluation, the Characterization Kit can be operated in loopback mode connected to high-performance test equipment.
More info: MoSys