Altera Heads to Embedded Systems Conference

Posted by Ken Cheung in Event on Wednesday, April 9, 2008

Altera Corporation (NASDAQ: ALTR) will demonstrate its low-power embedded technologies and programmable logic at the Embedded Systems Conference (ESC). Through sponsored tracks and in-booth demonstrations, attendees will learn how to rapidly reduce the power consumption and increase the flexibility of their embedded designs. The combination of the Nios® II embedded processor, the industry's most widely used soft processor, and Altera's latest portfolio of low-power FPGAs and easy-to-use development tools, offers embedded designers a powerful competitive edge.

Altera Sessions

  • Intelligent Power Management of FPGA Designs
    Presented by Steven Kravatsky
    Tuesday, April 15, 2008, 8:30-10:00 am and 2:30-4:00 pm
    This session shows you how to create embedded systems using solutions from Altera and Linear Technology that are power efficient and run off batteries. Learn how to dynamically modify FPGA power utilization using intelligent power management.
  • Designing Embedded Systems With FPGAs
    Presented by Rodney Frazer
    Tuesday, April 15, 2008, 10:30-12:00 pm and 4:30-6:00 pm
    This session shows you how to create embedded systems implemented in programmable logic. Learn how to build a processor-based hardware system and run software on it. See how quick and easy it is to build entire systems using Altera's SOPC Builder tool to configure and integrate hardware intellectual property (IP) blocks.

Product and Solution Demonstrations

  • Low Power
    • Reduce power consumption by adding hardware accelerators with the Nios II C2H Compiler
    • Intelligent power management with the Low Power Reference Platform
  • Hardware Design
    • SOC development with FPGAs with SOPC Builder
    • Flexible hardware debug with FPGAs using SignalTap II
    • Zero-power Max®IIZ CPLD
    • Hardware acceleration in COTS systems with XtremeData
    • ARM Cortex-M1
  • Software Development
    • Nios II Embedded Design Suite (EDS)
    • uCLinux on the Nios II processor
  • New to FPGA Design
    • Build your first FPGA design

More info: Altera at Embedded Systems Conference

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