Synplify Pro and Synplify Premier FPGA Synthesis Tools, 2011.09 Release

Synopsys rolled out the 2011.09 software release of Synplify Pro and Synplify Premier FPGA synthesis tools. The latest version enables engineers to build higher reliability into FPGA designs through a new feature that provides automated creation and preservation of error-correction logic, including safe finite-state machines (FSMs). The 2011.09 release of the Synplify Pro and Synplify Premier synthesis tools is available now.

Synplify Pro and Synplify Premier FPGA Synthesis Tools v2011.09 Features

  • Enables designers to create designs that are resistant to single event upsets (SEUs)
  • Increases reliability of FPGAs deployed in the field
  • Enhanced graphical interface
  • Interface enables users to intuitively validate and view synthesis settings prior to synthesis and then centrally monitor design progress hierarchically
  • Eases status monitoring and debugging in hierarchical design flows
  • Supports Synopsys DesignWare Library MacroCell IP
  • Robust ASIC prototyping solution
  • Helps engineers to build higher reliability into their FPGA designs
  • Automated creation and preservation of error-correction logic, including safe finite-state machines (FSMs)
  • Tracks progress and analyze synthesis results hierarchically
  • Option for designers to automatically preserve sequential logic
  • Synplify Premier automates implementation of 1-hot safe FSM error detection circuitry
  • Automatically convert gated and generated clocks that cross hierarchical boundaries in an ASIC design into equivalent FPGA structures
  • Synplify Premier now synthesizes encrypted DesignWare Library MacroCell Infrastructure IP
  • Encrypted RTL cores can now be read directly by Synopsys’ FPGA and ASIC implementation tools
  • Enables designers to seamlessly prototype ASIC designs in FPGAs
  • Newly supported DesignWare Infrastructure IP: ARM AMBA 3 (AXI, AHB, APB) interconnect, APB advanced peripherals, APB peripherals, microcontrollers (DW8051, DW6811) and memory controller components

More info: Synopsys