Dune Networks and AllowTech announced the availability of SPAUI and RXAUI cores for the Stratix II GX FPGA family. The two companies cooperated to ensure interoperability between Dune’s new generation of PETRA P220 and P230 devices and AllowTech’s SPAUI and RXAUI cores. SPAUI, an interface based on the XAUI industry standard, incorporates several extensions to support dense 10Gbps level applications with speedup, for accommodating such factors as packet headers, full rate 12GE, and in-band flow control. The SPAUI and RXAUI FPGA implementations are now available from AllowTech.
RXAUI is a reduced pin version of the industry standard XAUI that promotes using two 6.25Gbps lanes instead of the four 3.125Gbps lanes required by XAUI to implement a 10G interface.
AllowTech’s SPAUI implementation is available with both three and four serdes lanes of 3.125 to 6.25Gbps speeds. The FPGA cores maximize performance, and are capable of receiving and transmitting packet/bursts with zero gap/overhead. The SPAUI was designed to adapt easily to a large number of FPGA families.
SPAUI combines the benefits of both XAUI and SPI4.2 standards into a single SERDES-based interface, supporting MAC/Framer, NPU, and Traffic Management interconnection requirements. The interface extends the XAUI interface by introducing channelization and packet interleaving, and by refined flow control. SPAUI is implementation-friendly, supported easily by SERDES-based FPGA devices, and is backward compatible with the standard XAUI. The flexibility, simplicity, and robustness of SPAUI make it an ideal interface for dense 10Gbps networking applications. Any vendor implementing XAUI can support SPAUI easily, foregoing the need for special encoding or any other major change in silicon.