Synplicity, Inc. (NASDAQ:SYNP) released its newest version of Synplify® DSP ESL synthesis software for ASIC and FPGA design. The Synplify DSP 3.6 software includes new enhancements to its architectural optimizations and DSP synthesis methodology, as well as new Intellectual Property (IP) blocks and capacity improvements that will benefit customers working on complex digital multimedia and wireless IC designs.
Synplicity has enhanced the optimization engine to recognize repeating patterns of operations in the design, and apply time-multiplexed scheduling to reduce the implementation area. This results in much lower area across a broader set of algorithm designs. This technique is ideal for designers working on applications such as wireless, radar, and digital video compression which typically require patterns that are highly replicated.
For digital multimedia and wireless applications, the Synplify DSP 3.6 software now includes Reed-Solomon Encoder and Reed-Solomon Decoder blocks. These functions provide burst error correction for a variety of modern communication standards used in broadband modems, digital video broadcast, storage, and military/aerospace communications. The Synplify DSP Reed Solomon cores are extremely flexible with a broad range of bitwidth, codeword, message size, erasure, and polynomial generator support. In addition, these cores benefit from the Synplify DSP architectural optimization methodology where tradeoffs between low-area or high-speed are automatically chosen based on the target technology and user constraints. This delivers better results than parameterized RTL cores and makes Synplify DSP IP cores very easy to use for both FPGA and ASIC technologies.
Improved saturation and rounding capabilities have also been added to the Synplify DSP 3.6 library. The tool offers a full range of rounding options across the entire library so users gain more flexibility in controlling the precision and stability of their algorithms.
To support customers implementing multi-FPGA designs, Synplicity has improved the capacity of the DSP synthesis optimization engine in the Synplify DSP 3.6 software. The tool now supports 10 times larger models and design complexity—ideal for military and aerospace applications where large FPGAs or multiple FPGAs are in use.
More information: Synplicity