The DeepSub pPLL01 hard IP core, from Perceptia (IP and Design Services), has an output frequency range from 9 to 11-GHz and can be driven from sources down to 20-MHz. The design has accelerated lock-in (faster than 1-µs), and it features a very low phase noise of -116dBc/Hz at 10-GHz, measured at 1-MHz offset, or ultra-low jitter of less than 400 femto-seconds rms. The pPLL01 outperforms IP competition by an order of magnitude.
The pPLL01 has a footprint of 400 by 500 micron, and it consumes only 15 to 20-mW. The PLL was proven in a 40-nm CMOS process, and is suitable for migration to other deep submicron processes and process nodes. Perceptia offers the DeepSub pPLL01 in the form of hard IP for qualifying customers, with integration support and optional migration and customization services.
Perceptia’s DeepSub technology is aimed at semiconductor processes of 65nm and smaller, where conventional architectures have many challenges. DeepSub addresses those, and offers benefits including easy migration from one process to another and from one process node to another; smaller die area and lower power consumption. Performance is maintained over the full operating temperature and voltage range. DeepSub uniquely optimizes the mix of analog circuits and DSP, in order to consume very low power, and provide unsurpassed performance and flexibility.
More information: Perceptia Devices