Cswitch Corporation introduced its complete CS90 family of configurable logic devices. The CS90 is ideal for applications requiring up to 100 Gbps of packet processing bandwidth. The CS90 family is based upon Cswitch’s Configurable Switch Array (CSA) architecture, which is a dramatic departure from currently existing solutions. It offers ASIC performance with FPGA flexibility by embedding configurable functions that are tailored to efficiently support any packet-based application. The CS9070 is the first member of the CS90 device family and is sampling today. The CS9050 and the CS9090 will begin sampling later in 2008. Cswitch’s Andara Development Tool Suite supporting the CS90 family is available today for customers to begin their designs.
Cswitch’s innovative Configurable Switch Array (CSA) architecture includes fully configurable embedded blocks operating at up to 1 GHz, supporting common data plane functions such as header parsing and CRC generation. In addition, the architecture uses the proprietary dataCrossconnect packet transport fabric to move data between blocks at 2 GHz, an industry first. This combination of embedded blocks and innovative interconnect allows CS90 devices to break through bandwidth bottlenecks found in FPGAs, thereby offering a true ASIC alternative for next generation packet-based applications seeking 20 – 100 Gbps throughput.
The CS90 family consists of three devices: the CS9050, CS9070 and the CS9090. The family offers in excess of 9 million usable gates, complemented by up to 40 serial transceivers operating at 6.4 Gbps. Each member contains three types of embedded blocks called Configurable Packet Engines (CPE) designed to address header parsing, fast lookups, and high-bandwidth polynomial arithmetic. In addition, the family supports up to 19 Mbits of on-chip memory, as well as 4 embedded high-speed memory controllers supporting DDR2 and RLDRAMII at 533 MHz.
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