CebaTech CebaIP PlatformT for ASICs, FPGAs

Posted by Ken Cheung in Tool on Thursday, April 26, 2007

CebaTech's CebaIP PlatformT is a modular platform for integrating IP cores into application-specific integrated circuits (ASICs) or field-programmable gate arrays (FPGAs). The platform is a protocol-complete hardware and software framework for developing end-to-end data and storage networking solutions. Using the CebaIP Platform's integrated advanced direct memory access (DMA) controller with the OpenBSD software driver, designers are able to rapidly achieve complete data networking and storage product solutions.

The CebaIP Platform enables modular protocol-level connectivity between the media access controller (MAC) layer and host application layer interface. With supported data rates ranging from 1 Gb/s to 10 Gb/s, customers can choose from various platform configurations to meet the needs of their specific data and storage networking products. Implementation is supported for both ASICs and FPGAs.

Platform configurations initially supported by the CebaIP Platform includes GZIP-based compression and decompression with optional advanced encryption standard (AES) support. A second configuration includes partial TCP/IP offload with optional link aggregation, VLAN, and large send offload (LSO) support. Both configurations are available with the CebaIP Platform advanced descriptor-based DMA controller and OpenBSD reference software driver.

GZIP-based compression and decompression is available now for initial customer engagements, with general availability in late second quarter of 2007. The partial TCP/IP offload configuration will be available in the third quarter of 2007. Future configurations-including full TCP/IP offload, Internet protocol security (IPSec), iSCSI initiator and target, RDMA, and advanced rule-based filtering-will be released in late 2007 and early 2008.

More info:
» CebaTech Introduces CebaIP PlatformT for ASICs, FPGAs
» CebaIP Platform

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