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'Tool' Category Archive

Avnet Spartan-6 FPGA Motor Control Development Kit

Posted by Ken Cheung in Tool on Wednesday, December 14, 2011

Avnet Electronics Marketing introduced the Spartan-6 FPGA Motor Control Development Kit. The Avnet kit helps designers prototype motor control designs for applications in industrial automation, consumer electronics, medical diagnostics and robotics. The Avnet Spartan-6 FPGA Motor Control Development Kit is an ideal platform for engineers seeking to experiment with proven reference designs and develop custom [...]

Lattice Semiconductor PAC-Designer Mixed Signal Design Software v6.2

Posted by Ken Cheung in Tool on Monday, December 12, 2011

Lattice Semiconductor rolled out version 6.2 of their PAC-Designer mixed signal design software. PAC-Designer 6.2 features updated support for Lattice’s Platform Manager, Power Manager II and ispClock devices, reduced LogiBuilder code size, simplified design flow and better access to external Platform Manager pin-to-pin connections. PAC-Designer v6.2 can be downloaded now for free. PAC-Designer 6.2 software [...]

Kontron FMC-SER0 FPGA Mezzanine Card and KIT-FMC-DEV VITA 57 FMC Development Kit

Posted by Ken Cheung in Tool on Tuesday, December 6, 2011

Kontron rolled out the FMC-SER0 FPGA Mezzanine Card and the KIT-FMC-DEV VITA 57 Development Kit. The Kontron FMC-SER0 is an FMC HPC single-width module. It is designed to interface with any VITA 57 host board. The Kontron VITA 57 Development Kit KIT-FMC-DEV enables designers to use the Kontron FMC-SER0 as a reference design. All Kontron [...]

New Certify Multi-FPGA ASIC Prototyping Software and Identify RTL Debugger

Posted by Ken Cheung in Tool on Wednesday, November 16, 2011

Synopsys released the latest version of their Certify multi-FPGA ASIC prototyping software and Identify RTL Debugger. The new release of Identify and Certify FPGA software tools feature an improved flow, which results in higher productivity for users of Synopsys’ HAPS FPGA-based prototyping systems. It also ensure that engineers who build their own hardware prototypes can [...]

Alico Kinetic 3500 OMAP FPGA Sensor Development Kit

Posted by Ken Cheung in Tool on Monday, November 14, 2011

Alico Systems introduced the Kinetic 3500 OMAP FPGA Sensor Development Kit. The Alico Kinetic 3500 SDK is a turn-key embeddable sensor development kit based on open source LInux software and includes critical device drivers and sample code. The Kinetic 3500 kid is priced at $1,695 ($1,945 with GPS option). It is ideal for embedded industrial, [...]

Elma FPGA-based VPX-300 OpenVPX Development Platform

Posted by Ken Cheung in Tool on Thursday, November 10, 2011

Elma Electronic announced their VPX-300 OpenVPX reference platform. The 3U VPX development platform features a Virtex-6 FPGA based front end processor (FEP) card and uses a 7-slot backplane profile per VITA 65 BKP3-CEN07-15.2.3-n. The front end FPGA cluster performs incoming digital signal processing coupled via fabric to a back end data cluster. The Elma VPX-300 [...]

Altera Quartus II Software Version 11.1

Posted by Ken Cheung in Tool on Tuesday, November 8, 2011

Altera rolled out version 11.1 of their Quartus II design software for CPLD, FPGA and HardCopy ASIC designs. Quartus II software version 11.1 includes expanded support for Altera’s 28nm FPGAs, including compilation support for Arria V and Cyclone V FPGAs and enhanced support for Stratix V FPGAs. Both the Subscription Edition and the free Web [...]

White Paper: High-Level Implementation of Bit- and Cycle-Accurate Floating-Point DSP Algorithms with Xilinx FPGAs

Posted by Ken Cheung in Tool on Thursday, November 3, 2011

Xilinx recently published a white paper about floating-point DSP algorithms. According to the technical paper, Xilinx System Generator for DSP enables the creation of custom precision datapaths for optimal area and power. The floating-point design flow generates an implementation that is bit- and cycle-accurate to the original simulation model. The title of the white paper [...]

Aldec Active-HDL v9.1 FPGA Design and Simulation Tool

Posted by Ken Cheung in Tool on Wednesday, November 2, 2011

Aldec launched verion 9.1 of the Active-HDL FPGA Design and Simulation solution. Active-HDL v9.1 features auto-complete technology built into the HDL Editor, language templates, phrase highlighting, enhanced level of automation, and new HDL code browser tool that can detect errors in the source code even before compilation. The HDL-based tool supports design creation and simulation [...]

Xilinx ISE Design Suite 13.3 Supports Full Custom Precision Floating-Point

Posted by Ken Cheung in Tool on Tuesday, November 1, 2011

Xilinx released version 13.3 of their ISE Design Suite for DSP designers. The latest version of the tool makes it easier to implement bit-accurate single, double and full custom precision floating-point math operations in designs for wireless, medical, aerospace and defense, high-performance computing and video applications. ISE Design Suite 13 is available now for all [...]

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