Xilinx ISE Design Suite 12.2 and Partial Reconfiguration FPGA Flow
Xilinx introduced ISE Design Suite 12.2 and the fourth generation partial reconfiguration design flow. ISE Design Suite 12.2 features lower power consumption, reduced overall system costs, and a low-cost simulation solution for the embedded design flow. ISE Design Suite 12.2 is now available for all ISE Editions with list prices starting at $2,995 for the [...]
Altera Quartus II Software Version 10.0 for CPLD, FPGA, HardCopy ASIC
Altera announced version 10.0 of their Quartus II development software for CPLD, FPGA and HardCopy ASIC designs. Quartus II software v10.0 features 2X to 3X faster compile times than the nearest competitor for high-density designs. The latest software release includes support for Altera’s 28-nm Stratix V FPGA family and offers several new productivity features that [...]
Try Updated VeriLogger Extreme for Free for Six Months
For a limited time, SynaptiCAD will be giving away free “no strings attached” 6 month licenses for VeriLogger Extreme. Free licenses will be available for both Linux and Windows versions of the simulator. Unlike the lower cost simulators typically provided with FPGA tools, SynaptiCAD’s simulator is being distributed without any code that slows down the [...]
Lattice Diamond Design Software for FPGA Devices
Lattice Semiconductor launched their Lattice Diamond FPGA design software for Lattice FPGA products. Lattice Diamond software is a set of tools, efficient design flows and modern user interface that enables designers to more quickly target low power, cost sensitive FPGA applications. The Diamond software allows designers to efficiently manage multiple implementations in one project. Diamond [...]
inrevium TB-6V-LX760-LSI Virtex-6 FPGA LSI Evaluation Platform
Tokyo Electron Device (TED) introduced the TB-6V-LX760-LSI LSI development test platform. The inrevium TB-6V-LX760-LSI features a Xilinx Virtex-6 FPGA, high-speed memory (DDR3 SDRAM 1066Mbps), a USB interface, and support for a DDR memory controller and the DDR PHY interface (DFI). It is an ideal test platform for developing the LSIs that will serve as the [...]
NI 1483 Camera Link Adaptor Module
National Instruments introduced the NI 1483 Camera Link adapter module. The NI 1483 is a Camera Link adapter module for NI FlexRIO field-programmable gate array (FPGA) modules. It supports 80-bit, 10-tap base-, medium-, and full-configuration image acquisition from Camera Link 1.2 standard cameras. It also features four digital I/O channels, two optically isolated inputs, and [...]
LatticeXP2 Brevia Development Kit and Reference Designs
Lattice Semiconductor introduced the LatticeXP2 Brevia Development Kit and 28 new silicon-proven reference designs for developing high volume, cost sensitive, high density applications. The LatticeXP2 Brevia Development Kit features the LatticeXP2 LFXP2-5E-6TN144C device, 2Mb SPI Flash and 1Mb SRAM memory, expansion headers and several LEDs and user switches. Promotional pricing for the LatticeXP2 Brevia Development [...]
Actel Libero Features Access to Over 50 IP Cores
Actel’s Libero Gold and Platinum editions now include access to over fifty IP cores. The Libero Gold Edition, which supports Actel FPGAs up to 1.5 million system gates, includes obfuscated versions of the Actel IP cores that can be easily used in designs but cannot be modified. The Libero Platinum edition supports Actel FPGA devices [...]
Mentor Graphics Precision Rad-Tolerant FPGA Design Solution
Mentor Graphics launched the Precision Rad-Tolerant FPGA design solution for aerospace and high-reliability applications. Precision Rad-Tolerant is a synthesis-based radiation effects mitigation solution to reduce the risk of functionality problems including soft errors caused by single event upset (SEU) and single event transient (SET) disruptions. Initial support is available for SRAM, anti-fuse, and flash-based devices [...]
Synopsys Synphony HLS Supports Xilinx Virtex-6 FPGA Devices
Synopsys Synphony HLS (High Level Synthesis) now supports Xilinx Virtex-6 FPGAs. The high level synthesis flow provides Virtex-6 FPGA users with more automatic target-specific optimizations and architecture exploration from high level models and delivers up to 10X higher design and verification productivity than traditional RTL flows for communications and multimedia applications. Synphony HLS and C-model [...]
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