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	<title>FPGA Blog &#187; Tool</title>
	<atom:link href="http://fpgablog.com/posts/category/tool/feed/" rel="self" type="application/rss+xml" />
	<link>http://fpgablog.com</link>
	<description>FPGA (field programmable gate array) and structured ASIC information</description>
	<lastBuildDate>Fri, 03 Feb 2012 15:44:36 +0000</lastBuildDate>
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		<title>Avnet Announces Xilinx Kintex-7 FPGA DSP Development Kit</title>
		<link>http://fpgablog.com/posts/high-speed-analog/</link>
		<comments>http://fpgablog.com/posts/high-speed-analog/#comments</comments>
		<pubDate>Thu, 02 Feb 2012 18:23:01 +0000</pubDate>
		<dc:creator>Ken Cheung</dc:creator>
				<category><![CDATA[Tool]]></category>
		<category><![CDATA[7 Series]]></category>
		<category><![CDATA[Analog]]></category>
		<category><![CDATA[Avnet Electronics Marketing]]></category>
		<category><![CDATA[Development Kit]]></category>
		<category><![CDATA[DSP]]></category>
		<category><![CDATA[FPGA]]></category>
		<category><![CDATA[High-Speed]]></category>
		<category><![CDATA[Kintex-7]]></category>
		<category><![CDATA[Targeted Design Platforms]]></category>
		<category><![CDATA[Xilinx]]></category>

		<guid isPermaLink="false">http://fpgablog.com/?p=3627</guid>
		<description><![CDATA[Avnet Electronics Marketing introduced the Xilinx Kintex-7 FPGA DSP Development Kit with High-Speed Analog. The new kit supports Xilinx&#8217;s 7 series Targeted Design Platforms. The Avnet includes the Xilinx Kintex-7 KC705 base board with Kintex-7 FPGA, 4DSP FMC 150 High-Speed ADC/DAC FMC, 12V power supply, Xilinx ISE Design Suite: System Edition, and Targeted Reference Designs [...]]]></description>
			<content:encoded><![CDATA[<p>Avnet Electronics Marketing introduced the Xilinx Kintex-7 FPGA DSP Development Kit with High-Speed Analog. The new kit supports Xilinx&#8217;s 7 series Targeted Design Platforms. The Avnet includes the Xilinx Kintex-7 KC705 base board with Kintex-7 FPGA, 4DSP FMC 150 High-Speed ADC/DAC FMC, 12V power supply, Xilinx ISE Design Suite: System Edition, and Targeted Reference Designs (RTL and MathWorks model-based design tool flows). The Xilinx Kintex-7 FPGA DSP Development Kit is available for $3,995.</p>
<p><p>Read more <a href="http://fpgablog.com/posts/high-speed-analog/">Avnet Announces Xilinx Kintex-7 FPGA DSP Development Kit</a></p><p align="center"><a href="http://api.tweetmeme.com/share?url=http://fpgablog.com/posts/high-speed-analog/"><img src="http://api.tweetmeme.com/imagebutton.gif?url=http://fpgablog.com/posts/high-speed-analog/" height="61" width="51" /></a></p>
<p align="center"><a href="http://twitter.com/fpgablog">Twitter @fpgablog</a> : : <a href="http://embeddedstar.tradepub.com/">Free Trade Publications</a> : : <a href="http://www.embeddedstar.com/careers/">Jobs</a> : : <a href="http://fpgablog.com/">FPGA Blog</a> : : <a href="http://edablog.com/">EDA Blog</a> : : <a href="http://www.embeddedstar.com/">Embedded Star</a> : : <a href="http://edageek.com/">EDA Geek</a> : : <a href="http://daddyforever.com/">Dad Blog</a><br />© 2012 <a href="http://www.onlinedestiny.com/">Online Destiny Ltd</a> : : FPGA Blog is a trademark of Online Destiny Ltd</p>]]></content:encoded>
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		</item>
		<item>
		<title>ADI AD9739A D/A, AD9467 A/D Boards Support Xilinx FPGA Targeted Design Platforms</title>
		<link>http://fpgablog.com/posts/kintex-7-fmc/</link>
		<comments>http://fpgablog.com/posts/kintex-7-fmc/#comments</comments>
		<pubDate>Wed, 01 Feb 2012 16:06:04 +0000</pubDate>
		<dc:creator>Ken Cheung</dc:creator>
				<category><![CDATA[Tool]]></category>
		<category><![CDATA[A/D converter]]></category>
		<category><![CDATA[AD9467]]></category>
		<category><![CDATA[AD9739A]]></category>
		<category><![CDATA[ADI]]></category>
		<category><![CDATA[Analog Devices]]></category>
		<category><![CDATA[D/A converter]]></category>
		<category><![CDATA[FMC Boards]]></category>
		<category><![CDATA[FPGA]]></category>
		<category><![CDATA[FPGA mezzanine cards]]></category>
		<category><![CDATA[HDL]]></category>
		<category><![CDATA[Kintex-7]]></category>
		<category><![CDATA[Targeted Design Platforms]]></category>
		<category><![CDATA[Xilinx]]></category>

		<guid isPermaLink="false">http://fpgablog.com/?p=3619</guid>
		<description><![CDATA[Analog Devices unveiled the AD9739A D/A converter and AD9467 A/D converter FMC boards. The two data converter FPGA mezzanine cards can connect to Xilinx&#8217;s new 28nm 7 series field programmable gate array evaluation kits. The Analog Devices FMC boards support multiple generations of Xilinx kits (including the new Kintex-7 FPGA evaluation kits). The ADI FMC [...]]]></description>
			<content:encoded><![CDATA[<p>Analog Devices unveiled the AD9739A D/A converter and AD9467 A/D converter FMC boards. The two data converter FPGA mezzanine cards can connect to Xilinx&#8217;s new 28nm 7 series field programmable gate array evaluation kits. The Analog Devices FMC boards support multiple generations of Xilinx kits (including the new Kintex-7 FPGA evaluation kits). The ADI FMC boards include all of the HDL (hardware description language) code and device drivers needed for designers to engage in rapid prototyping and reduce development time and risk.</p>
<p><p>Read more <a href="http://fpgablog.com/posts/kintex-7-fmc/">ADI AD9739A D/A, AD9467 A/D Boards Support Xilinx FPGA Targeted Design Platforms</a></p><p align="center"><a href="http://api.tweetmeme.com/share?url=http://fpgablog.com/posts/kintex-7-fmc/"><img src="http://api.tweetmeme.com/imagebutton.gif?url=http://fpgablog.com/posts/kintex-7-fmc/" height="61" width="51" /></a></p>
<p align="center"><a href="http://twitter.com/fpgablog">Twitter @fpgablog</a> : : <a href="http://embeddedstar.tradepub.com/">Free Trade Publications</a> : : <a href="http://www.embeddedstar.com/careers/">Jobs</a> : : <a href="http://fpgablog.com/">FPGA Blog</a> : : <a href="http://edablog.com/">EDA Blog</a> : : <a href="http://www.embeddedstar.com/">Embedded Star</a> : : <a href="http://edageek.com/">EDA Geek</a> : : <a href="http://daddyforever.com/">Dad Blog</a><br />© 2012 <a href="http://www.onlinedestiny.com/">Online Destiny Ltd</a> : : FPGA Blog is a trademark of Online Destiny Ltd</p>]]></content:encoded>
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		</item>
		<item>
		<title>Xilinx Debuts Three Targeted Design Platforms for 28nm 7 Series FPGAs</title>
		<link>http://fpgablog.com/posts/virtex-kintex-fpga-dsp-kit/</link>
		<comments>http://fpgablog.com/posts/virtex-kintex-fpga-dsp-kit/#comments</comments>
		<pubDate>Tue, 31 Jan 2012 17:04:20 +0000</pubDate>
		<dc:creator>Ken Cheung</dc:creator>
				<category><![CDATA[Tool]]></category>
		<category><![CDATA[7 Series]]></category>
		<category><![CDATA[design]]></category>
		<category><![CDATA[Design Platforms]]></category>
		<category><![CDATA[DSP Kit]]></category>
		<category><![CDATA[Evaluation Kit]]></category>
		<category><![CDATA[field programmable gate arrays]]></category>
		<category><![CDATA[FPGA]]></category>
		<category><![CDATA[KC705]]></category>
		<category><![CDATA[Kintex-7]]></category>
		<category><![CDATA[System]]></category>
		<category><![CDATA[VC707]]></category>
		<category><![CDATA[Virtex-7]]></category>
		<category><![CDATA[Xilinx]]></category>

		<guid isPermaLink="false">http://fpgablog.com/?p=3615</guid>
		<description><![CDATA[Xilinx introduced three targeted design platforms: Virtex-7 FPGA VC707 Evaluation Kit, the Kintex-7 FPGA KC705 Evaluation Kit, and the Kintex-7 FPGA DSP Kit. The comprehensive development kits are designed for accelerating systems development and integration with Xilinx&#8217;s 28nm 7 series Field-Programmable Gate Arrays (FPGAs). The new targeted design platforms include boards, ISE Design Suite tools, [...]]]></description>
			<content:encoded><![CDATA[<p>Xilinx introduced three targeted design platforms: Virtex-7 FPGA VC707 Evaluation Kit, the Kintex-7 FPGA KC705 Evaluation Kit, and the Kintex-7 FPGA DSP Kit. The comprehensive development kits are designed for accelerating systems development and integration with Xilinx&#8217;s 28nm 7 series Field-Programmable Gate Arrays (FPGAs). The new targeted design platforms include boards, ISE Design Suite tools, IP cores, reference designs and FPGA Mezzanine Card (FMC) support. The three new kits are the first among nearly 40 to be delivered by Xilinx and ecosystem members.</p>
<p><p>Read more <a href="http://fpgablog.com/posts/virtex-kintex-fpga-dsp-kit/">Xilinx Debuts Three Targeted Design Platforms for 28nm 7 Series FPGAs</a></p><p align="center"><a href="http://api.tweetmeme.com/share?url=http://fpgablog.com/posts/virtex-kintex-fpga-dsp-kit/"><img src="http://api.tweetmeme.com/imagebutton.gif?url=http://fpgablog.com/posts/virtex-kintex-fpga-dsp-kit/" height="61" width="51" /></a></p>
<p align="center"><a href="http://twitter.com/fpgablog">Twitter @fpgablog</a> : : <a href="http://embeddedstar.tradepub.com/">Free Trade Publications</a> : : <a href="http://www.embeddedstar.com/careers/">Jobs</a> : : <a href="http://fpgablog.com/">FPGA Blog</a> : : <a href="http://edablog.com/">EDA Blog</a> : : <a href="http://www.embeddedstar.com/">Embedded Star</a> : : <a href="http://edageek.com/">EDA Geek</a> : : <a href="http://daddyforever.com/">Dad Blog</a><br />© 2012 <a href="http://www.onlinedestiny.com/">Online Destiny Ltd</a> : : FPGA Blog is a trademark of Online Destiny Ltd</p>]]></content:encoded>
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		</item>
		<item>
		<title>Xilinx Releases ISE Design Suite v13.4</title>
		<link>http://fpgablog.com/posts/rx-margin-analysis/</link>
		<comments>http://fpgablog.com/posts/rx-margin-analysis/#comments</comments>
		<pubDate>Wed, 18 Jan 2012 18:06:01 +0000</pubDate>
		<dc:creator>Ken Cheung</dc:creator>
				<category><![CDATA[Tool]]></category>
		<category><![CDATA[7 Series FPGA]]></category>
		<category><![CDATA[Artix-7]]></category>
		<category><![CDATA[DEBUG]]></category>
		<category><![CDATA[FPGAs]]></category>
		<category><![CDATA[ISE Design Suite]]></category>
		<category><![CDATA[MCS]]></category>
		<category><![CDATA[MicroBlaze Micro Controller System]]></category>
		<category><![CDATA[RX Margin Analysis]]></category>
		<category><![CDATA[Virtex-7 XT]]></category>
		<category><![CDATA[Xilinx]]></category>

		<guid isPermaLink="false">http://fpgablog.com/?p=3586</guid>
		<description><![CDATA[Xilinx rolled out version 13.4 of their ISE Design Suite. ISE Design Suite 13.4 features public access to the MicroBlaze Micro Controller System (MCS), new RX Margin Analysis and debug capabilities for the 28nm 7 Series FPGAs and partial reconfiguration support for the Artix-7 family and Virtex-7 XT devices. ISE Design Suite v13.4 is available [...]]]></description>
			<content:encoded><![CDATA[<p>Xilinx rolled out version 13.4 of their ISE Design Suite. ISE Design Suite 13.4 features public access to the MicroBlaze Micro Controller System (MCS), new RX Margin Analysis and debug capabilities for the 28nm 7 Series FPGAs and partial reconfiguration support for the Artix-7 family and Virtex-7 XT devices. ISE Design Suite v13.4 is available now for all ISE Editions. List prices start at $2,995 for the Logic Edition.</p>
<p><p>Read more <a href="http://fpgablog.com/posts/rx-margin-analysis/">Xilinx Releases ISE Design Suite v13.4</a></p><p align="center"><a href="http://api.tweetmeme.com/share?url=http://fpgablog.com/posts/rx-margin-analysis/"><img src="http://api.tweetmeme.com/imagebutton.gif?url=http://fpgablog.com/posts/rx-margin-analysis/" height="61" width="51" /></a></p>
<p align="center"><a href="http://twitter.com/fpgablog">Twitter @fpgablog</a> : : <a href="http://embeddedstar.tradepub.com/">Free Trade Publications</a> : : <a href="http://www.embeddedstar.com/careers/">Jobs</a> : : <a href="http://fpgablog.com/">FPGA Blog</a> : : <a href="http://edablog.com/">EDA Blog</a> : : <a href="http://www.embeddedstar.com/">Embedded Star</a> : : <a href="http://edageek.com/">EDA Geek</a> : : <a href="http://daddyforever.com/">Dad Blog</a><br />© 2012 <a href="http://www.onlinedestiny.com/">Online Destiny Ltd</a> : : FPGA Blog is a trademark of Online Destiny Ltd</p>]]></content:encoded>
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		</item>
		<item>
		<title>Xilinx Targets 3D and 4K2K Displays with Reference Designs and ACDC Baseboard</title>
		<link>http://fpgablog.com/posts/inrevium-kintex-7/</link>
		<comments>http://fpgablog.com/posts/inrevium-kintex-7/#comments</comments>
		<pubDate>Thu, 05 Jan 2012 16:46:14 +0000</pubDate>
		<dc:creator>Ken Cheung</dc:creator>
				<category><![CDATA[FPGA-based Product]]></category>
		<category><![CDATA[Reference Design]]></category>
		<category><![CDATA[Tool]]></category>
		<category><![CDATA[3D]]></category>
		<category><![CDATA[4K2K]]></category>
		<category><![CDATA[4K2K Mosaic]]></category>
		<category><![CDATA[ACDC]]></category>
		<category><![CDATA[Baseboard]]></category>
		<category><![CDATA[Displays]]></category>
		<category><![CDATA[FPGA]]></category>
		<category><![CDATA[HDTV-to-4K2K]]></category>
		<category><![CDATA[Inrevium]]></category>
		<category><![CDATA[Kintex-7]]></category>
		<category><![CDATA[reference designs]]></category>
		<category><![CDATA[up-converter]]></category>
		<category><![CDATA[Xilinx]]></category>

		<guid isPermaLink="false">http://fpgablog.com/?p=3577</guid>
		<description><![CDATA[Xilinx introduced reference designs and a development baseboard for speeding the development of next-generation, 3D and 4K2K display technologies. The 4K2K Mosaic and HDTV-to-4K2K up-converter targeted reference designs are based on the new 28nm Kintex-7 Field Programmable Gate Array (FPGA). The new ACDC (Acquisition, Contribution, Distribution and Consumption) 1.0 Baseboard also uses Kintex-7 FPGA devices. [...]]]></description>
			<content:encoded><![CDATA[<p>Xilinx introduced reference designs and a development baseboard for speeding the development of next-generation, 3D and 4K2K display technologies. The 4K2K Mosaic and HDTV-to-4K2K up-converter targeted reference designs are based on the new 28nm Kintex-7 Field Programmable Gate Array (FPGA). The new ACDC (Acquisition, Contribution, Distribution and Consumption) 1.0 Baseboard also uses Kintex-7 FPGA devices. The targeted reference designs and ACDC 1.0 Baseboard with the Kintex-7 FPGA will be available in Q2 2012.</p>
<p><p>Read more <a href="http://fpgablog.com/posts/inrevium-kintex-7/">Xilinx Targets 3D and 4K2K Displays with Reference Designs and ACDC Baseboard</a></p><p align="center"><a href="http://api.tweetmeme.com/share?url=http://fpgablog.com/posts/inrevium-kintex-7/"><img src="http://api.tweetmeme.com/imagebutton.gif?url=http://fpgablog.com/posts/inrevium-kintex-7/" height="61" width="51" /></a></p>
<p align="center"><a href="http://twitter.com/fpgablog">Twitter @fpgablog</a> : : <a href="http://embeddedstar.tradepub.com/">Free Trade Publications</a> : : <a href="http://www.embeddedstar.com/careers/">Jobs</a> : : <a href="http://fpgablog.com/">FPGA Blog</a> : : <a href="http://edablog.com/">EDA Blog</a> : : <a href="http://www.embeddedstar.com/">Embedded Star</a> : : <a href="http://edageek.com/">EDA Geek</a> : : <a href="http://daddyforever.com/">Dad Blog</a><br />© 2012 <a href="http://www.onlinedestiny.com/">Online Destiny Ltd</a> : : FPGA Blog is a trademark of Online Destiny Ltd</p>]]></content:encoded>
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		</item>
		<item>
		<title>D.SignT D.Module2.Base-FMC Board Supports Two Modular Standards</title>
		<link>http://fpgablog.com/posts/ansi-vita-s7-fmc/</link>
		<comments>http://fpgablog.com/posts/ansi-vita-s7-fmc/#comments</comments>
		<pubDate>Wed, 04 Jan 2012 18:28:06 +0000</pubDate>
		<dc:creator>Ken Cheung</dc:creator>
				<category><![CDATA[Tool]]></category>
		<category><![CDATA[Ansi Vita S7]]></category>
		<category><![CDATA[board]]></category>
		<category><![CDATA[D.Module2.Base-FMC]]></category>
		<category><![CDATA[D.SignT]]></category>
		<category><![CDATA[DSP]]></category>
		<category><![CDATA[FMC]]></category>
		<category><![CDATA[FPGA]]></category>
		<category><![CDATA[module]]></category>

		<guid isPermaLink="false">http://fpgablog.com/?p=3572</guid>
		<description><![CDATA[Thanks to the D.Module2.Base-FMC from D.SignT, developers can combine D.Module DSP and FPGA boards with Ansi Vita S7 compliant FMC modules. D.SignT&#8217;s D2-Base-FMC is a prototyping and evaluation platform for the D.Module2 family of DSP and FPGA boards. The D.Module2 standard allows stacking of modules so both an FPGA and a DSP module can be [...]]]></description>
			<content:encoded><![CDATA[<p>Thanks to the D.Module2.Base-FMC from D.SignT, developers can combine D.Module DSP and FPGA boards with Ansi Vita S7 compliant FMC modules. D.SignT&#8217;s D2-Base-FMC is a prototyping and evaluation platform for the D.Module2 family of DSP and FPGA boards. The D.Module2 standard allows stacking of modules so both an FPGA and a DSP module can be used for processing data for the same application. The board&#8217;s Ansi Vita 57 compliant FMC LPC IO site enables it to be used with industry-standard mezzanine boards (such as A/D and D/A data acquisition, video and camera interfaces, and digital radio frontends).</p>
<p><p>Read more <a href="http://fpgablog.com/posts/ansi-vita-s7-fmc/">D.SignT D.Module2.Base-FMC Board Supports Two Modular Standards</a></p><p align="center"><a href="http://api.tweetmeme.com/share?url=http://fpgablog.com/posts/ansi-vita-s7-fmc/"><img src="http://api.tweetmeme.com/imagebutton.gif?url=http://fpgablog.com/posts/ansi-vita-s7-fmc/" height="61" width="51" /></a></p>
<p align="center"><a href="http://twitter.com/fpgablog">Twitter @fpgablog</a> : : <a href="http://embeddedstar.tradepub.com/">Free Trade Publications</a> : : <a href="http://www.embeddedstar.com/careers/">Jobs</a> : : <a href="http://fpgablog.com/">FPGA Blog</a> : : <a href="http://edablog.com/">EDA Blog</a> : : <a href="http://www.embeddedstar.com/">Embedded Star</a> : : <a href="http://edageek.com/">EDA Geek</a> : : <a href="http://daddyforever.com/">Dad Blog</a><br />© 2012 <a href="http://www.onlinedestiny.com/">Online Destiny Ltd</a> : : FPGA Blog is a trademark of Online Destiny Ltd</p>]]></content:encoded>
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		<item>
		<title>Lattice Diamond Design Software v1.4</title>
		<link>http://fpgablog.com/posts/lattice-diamond-v1-4/</link>
		<comments>http://fpgablog.com/posts/lattice-diamond-v1-4/#comments</comments>
		<pubDate>Thu, 15 Dec 2011 16:50:59 +0000</pubDate>
		<dc:creator>Ken Cheung</dc:creator>
				<category><![CDATA[Tool]]></category>
		<category><![CDATA[Design Software]]></category>
		<category><![CDATA[FPGA]]></category>
		<category><![CDATA[Lattice Diamond]]></category>
		<category><![CDATA[Lattice Semiconductor]]></category>

		<guid isPermaLink="false">http://fpgablog.com/?p=3546</guid>
		<description><![CDATA[Lattice Semiconductor introduced version 1.4 of the Lattice Diamond design software. Lattice Diamond v1.4 features several usability enhancements that make FPGA design exploration easier and reduce time to market. Lattice Diamond v1.4 software is available now for for both Windows and Linux. Once downloaded and installed, the software can be used with either the Lattice [...]]]></description>
			<content:encoded><![CDATA[<p>Lattice Semiconductor introduced version 1.4 of the Lattice Diamond design software. Lattice Diamond v1.4 features several usability enhancements that make FPGA design exploration easier and reduce time to market. Lattice Diamond v1.4 software is available now for for both Windows and Linux. Once downloaded and installed, the software can be used with either the Lattice Diamond free license or the Lattice Diamond subscription license. The Lattice Diamond free license provides no cost access to many Lattice devices such as the MachXO2 and MachXO device families, the LatticeXP2 and LatticeECP2 FPGA families, and the Platform Manager devices. The Lattice Diamond free license enables Synopsys Synplify Pro for Lattice synthesis as well as the Aldec Lattice Edition II mixed language simulator.</p>
<p><p>Read more <a href="http://fpgablog.com/posts/lattice-diamond-v1-4/">Lattice Diamond Design Software v1.4</a></p><p align="center"><a href="http://api.tweetmeme.com/share?url=http://fpgablog.com/posts/lattice-diamond-v1-4/"><img src="http://api.tweetmeme.com/imagebutton.gif?url=http://fpgablog.com/posts/lattice-diamond-v1-4/" height="61" width="51" /></a></p>
<p align="center"><a href="http://twitter.com/fpgablog">Twitter @fpgablog</a> : : <a href="http://embeddedstar.tradepub.com/">Free Trade Publications</a> : : <a href="http://www.embeddedstar.com/careers/">Jobs</a> : : <a href="http://fpgablog.com/">FPGA Blog</a> : : <a href="http://edablog.com/">EDA Blog</a> : : <a href="http://www.embeddedstar.com/">Embedded Star</a> : : <a href="http://edageek.com/">EDA Geek</a> : : <a href="http://daddyforever.com/">Dad Blog</a><br />© 2011 <a href="http://www.onlinedestiny.com/">Online Destiny Ltd</a> : : FPGA Blog is a trademark of Online Destiny Ltd</p>]]></content:encoded>
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		</item>
		<item>
		<title>Avnet Spartan-6 FPGA Motor Control Development Kit</title>
		<link>http://fpgablog.com/posts/lx75t-fmc-module/</link>
		<comments>http://fpgablog.com/posts/lx75t-fmc-module/#comments</comments>
		<pubDate>Wed, 14 Dec 2011 15:48:53 +0000</pubDate>
		<dc:creator>Ken Cheung</dc:creator>
				<category><![CDATA[Tool]]></category>
		<category><![CDATA[Avnet Electronics Marketing]]></category>
		<category><![CDATA[Development Kit]]></category>
		<category><![CDATA[FMC module]]></category>
		<category><![CDATA[FPGA]]></category>
		<category><![CDATA[LX75T]]></category>
		<category><![CDATA[Motor Control]]></category>
		<category><![CDATA[Spartan-6]]></category>

		<guid isPermaLink="false">http://fpgablog.com/?p=3554</guid>
		<description><![CDATA[Avnet Electronics Marketing introduced the Spartan-6 FPGA Motor Control Development Kit. The Avnet kit helps designers prototype motor control designs for applications in industrial automation, consumer electronics, medical diagnostics and robotics. The Avnet Spartan-6 FPGA Motor Control Development Kit is an ideal platform for engineers seeking to experiment with proven reference designs and develop custom [...]]]></description>
			<content:encoded><![CDATA[<p>Avnet Electronics Marketing introduced the Spartan-6 FPGA Motor Control Development Kit. The Avnet kit helps designers prototype motor control designs for applications in industrial automation, consumer electronics, medical diagnostics and robotics. The Avnet Spartan-6 FPGA Motor Control Development Kit is an ideal platform for engineers seeking to experiment with proven reference designs and develop custom control, integrating flexible peripheral functions like Ethernet, PowerLink and PCI Express (PCIe).</p>
<p><p>Read more <a href="http://fpgablog.com/posts/lx75t-fmc-module/">Avnet Spartan-6 FPGA Motor Control Development Kit</a></p><p align="center"><a href="http://api.tweetmeme.com/share?url=http://fpgablog.com/posts/lx75t-fmc-module/"><img src="http://api.tweetmeme.com/imagebutton.gif?url=http://fpgablog.com/posts/lx75t-fmc-module/" height="61" width="51" /></a></p>
<p align="center"><a href="http://twitter.com/fpgablog">Twitter @fpgablog</a> : : <a href="http://embeddedstar.tradepub.com/">Free Trade Publications</a> : : <a href="http://www.embeddedstar.com/careers/">Jobs</a> : : <a href="http://fpgablog.com/">FPGA Blog</a> : : <a href="http://edablog.com/">EDA Blog</a> : : <a href="http://www.embeddedstar.com/">Embedded Star</a> : : <a href="http://edageek.com/">EDA Geek</a> : : <a href="http://daddyforever.com/">Dad Blog</a><br />© 2011 <a href="http://www.onlinedestiny.com/">Online Destiny Ltd</a> : : FPGA Blog is a trademark of Online Destiny Ltd</p>]]></content:encoded>
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		<title>Lattice Semiconductor PAC-Designer Mixed Signal Design Software v6.2</title>
		<link>http://fpgablog.com/posts/pac-designer-v62/</link>
		<comments>http://fpgablog.com/posts/pac-designer-v62/#comments</comments>
		<pubDate>Mon, 12 Dec 2011 16:33:10 +0000</pubDate>
		<dc:creator>Ken Cheung</dc:creator>
				<category><![CDATA[Tool]]></category>
		<category><![CDATA[Design Software]]></category>
		<category><![CDATA[Lattice Semiconductor]]></category>
		<category><![CDATA[mixed signal]]></category>
		<category><![CDATA[PAC-Designer]]></category>

		<guid isPermaLink="false">http://fpgablog.com/?p=3542</guid>
		<description><![CDATA[Lattice Semiconductor rolled out version 6.2 of their PAC-Designer mixed signal design software. PAC-Designer 6.2 features updated support for Lattice&#8217;s Platform Manager, Power Manager II and ispClock devices, reduced LogiBuilder code size, simplified design flow and better access to external Platform Manager pin-to-pin connections. PAC-Designer v6.2 can be downloaded now for free. PAC-Designer 6.2 software [...]]]></description>
			<content:encoded><![CDATA[<p>Lattice Semiconductor rolled out version 6.2 of their PAC-Designer mixed signal design software. PAC-Designer 6.2 features updated support for Lattice&#8217;s Platform Manager, Power Manager II and ispClock devices, reduced LogiBuilder code size, simplified design flow and better access to external Platform Manager pin-to-pin connections. PAC-Designer v6.2 can be downloaded now for free. PAC-Designer 6.2 software does not require a separate license file.</p>
<p><p>Read more <a href="http://fpgablog.com/posts/pac-designer-v62/">Lattice Semiconductor PAC-Designer Mixed Signal Design Software v6.2</a></p><p align="center"><a href="http://api.tweetmeme.com/share?url=http://fpgablog.com/posts/pac-designer-v62/"><img src="http://api.tweetmeme.com/imagebutton.gif?url=http://fpgablog.com/posts/pac-designer-v62/" height="61" width="51" /></a></p>
<p align="center"><a href="http://twitter.com/fpgablog">Twitter @fpgablog</a> : : <a href="http://embeddedstar.tradepub.com/">Free Trade Publications</a> : : <a href="http://www.embeddedstar.com/careers/">Jobs</a> : : <a href="http://fpgablog.com/">FPGA Blog</a> : : <a href="http://edablog.com/">EDA Blog</a> : : <a href="http://www.embeddedstar.com/">Embedded Star</a> : : <a href="http://edageek.com/">EDA Geek</a> : : <a href="http://daddyforever.com/">Dad Blog</a><br />© 2011 <a href="http://www.onlinedestiny.com/">Online Destiny Ltd</a> : : FPGA Blog is a trademark of Online Destiny Ltd</p>]]></content:encoded>
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		<title>Kontron FMC-SER0 FPGA Mezzanine Card and KIT-FMC-DEV VITA 57 FMC Development Kit</title>
		<link>http://fpgablog.com/posts/fpga-vita-57/</link>
		<comments>http://fpgablog.com/posts/fpga-vita-57/#comments</comments>
		<pubDate>Tue, 06 Dec 2011 16:15:51 +0000</pubDate>
		<dc:creator>Ken Cheung</dc:creator>
				<category><![CDATA[Tool]]></category>
		<category><![CDATA[Development Kit]]></category>
		<category><![CDATA[FMC]]></category>
		<category><![CDATA[FMC-SER0]]></category>
		<category><![CDATA[FPGA Mezzanine Card]]></category>
		<category><![CDATA[KIT-FMC-DEV]]></category>
		<category><![CDATA[Kontron]]></category>
		<category><![CDATA[VITA 57]]></category>

		<guid isPermaLink="false">http://fpgablog.com/?p=3529</guid>
		<description><![CDATA[Kontron rolled out the FMC-SER0 FPGA Mezzanine Card and the KIT-FMC-DEV VITA 57 Development Kit. The Kontron FMC-SER0 is an FMC HPC single-width module. It is designed to interface with any VITA 57 host board. The Kontron VITA 57 Development Kit KIT-FMC-DEV enables designers to use the Kontron FMC-SER0 as a reference design. All Kontron [...]]]></description>
			<content:encoded><![CDATA[<p>Kontron rolled out the FMC-SER0 FPGA Mezzanine Card and the KIT-FMC-DEV VITA 57 Development Kit. The Kontron FMC-SER0 is an FMC HPC single-width module. It is designed to interface with any VITA 57 host board. The Kontron VITA 57 Development Kit KIT-FMC-DEV enables designers to use the Kontron FMC-SER0 as a reference design. All Kontron VITA 57 products are available now. They can be ordered directly off the shelf or as customized application ready platforms and can be bundled with Kontron&#8217;s long term supply program, which guarantees customers multi-year supply of the product beyond its active life.</p>
<p><p>Read more <a href="http://fpgablog.com/posts/fpga-vita-57/">Kontron FMC-SER0 FPGA Mezzanine Card and KIT-FMC-DEV VITA 57 FMC Development Kit</a></p><p align="center"><a href="http://api.tweetmeme.com/share?url=http://fpgablog.com/posts/fpga-vita-57/"><img src="http://api.tweetmeme.com/imagebutton.gif?url=http://fpgablog.com/posts/fpga-vita-57/" height="61" width="51" /></a></p>
<p align="center"><a href="http://twitter.com/fpgablog">Twitter @fpgablog</a> : : <a href="http://embeddedstar.tradepub.com/">Free Trade Publications</a> : : <a href="http://www.embeddedstar.com/careers/">Jobs</a> : : <a href="http://fpgablog.com/">FPGA Blog</a> : : <a href="http://edablog.com/">EDA Blog</a> : : <a href="http://www.embeddedstar.com/">Embedded Star</a> : : <a href="http://edageek.com/">EDA Geek</a> : : <a href="http://daddyforever.com/">Dad Blog</a><br />© 2011 <a href="http://www.onlinedestiny.com/">Online Destiny Ltd</a> : : FPGA Blog is a trademark of Online Destiny Ltd</p>]]></content:encoded>
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