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Xilinx Spartan-6 LX16 Evaluation Kit

Ken Cheung — Thu, 02 Sep 2010 19:34:37 +0000

At the heart of the Xilinx Spartan-6 LX16 FPGA Evaluation Board is a Cypress PSoC 3 programmable system-on-chip. The PSoC 3 device integrates precision analog sensing, system management and user interface functions. The PSoC 3 device performs power management, CapSense touch-sensing, USB/UART/SPI connectivity and configuration of the Field Programmable Gate Array (FPGA) directly on the board. Flexible PSoC 3 I/Os also enable the board to interface to the analog world through an expansion connector that accepts an included Avnet LCD board, user prototype boards and various Cypress expansion boards.

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Impulse C to FPGA Toolset for Stone Ridge RDX-11 FPGA Board and Kit

Ken Cheung — Wed, 01 Sep 2010 16:28:11 +0000

Stone Ridge Technology and Impulse Accelerated Technologies teamed together to integrate Impulse C to FPGA toolset with Stone Ridge’s RDX-11 FPGA board and development kit. The integration enables software developers to write HLL (high level language) algorithms that rapidly compile to optimized RTL (run time language). Developers can purchase Impulse C or Stone Ridge boards from the respective manufacturers.

Lattice ispLEVER Classic 1.4 Design Tool Suite

Ken Cheung — Mon, 16 Aug 2010 17:35:15 +0000

Lattice Semiconductor launched ispLEVER Classic design tool suite, version 1.4. The upgraded ispLEVER Classic features Synopsys Synplify Pro with the HDL Analyst feature set, and an improved ispMACH 4000ZE CPLD fitter with improved power optimization. Classic 1.4 software is compatible with Windows XP/Vista/7 and operates as a 32-bit application. The ispLEVER Classic 1.4 tool suite is available now for free. Designers can also download the optional Synopsys Synplify Pro logic synthesis and Aldec Active-HDL simulator modules.

InPA Systems Develops Active Debug Technology for Rapid Prototyping

Ken Cheung — Mon, 16 Aug 2010 15:59:23 +0000

InPA Systems, Inc. is officially being launched today. The company was formed to develop and market FPGA-based rapid prototyping technology to engineers. The company integrates RTL simulation, hardware and software debug environments, provides an Active Debug methodology and enables full visibility into the multi-FPGA prototype to compress the time it takes to debug SoC designs. InPA Systems’ patent pending Active Debug feature full visibility technology to better detect hardware faults and reduce the FPGA P&R iterations associated with the debug cycle for next-generation complex SoCs.

Actel Libero IDE Supports Windows 7

Ken Cheung — Thu, 12 Aug 2010 17:44:26 +0000

Actel recently releases Service Pack 2 for the Libero Integrated Design Environment (IDE) v9.0. The new release features support for Windows 7. The latest release of the software toolset also include features for SmartFusion intelligent mixed signal FPGAs and RTAX-DSP FPGAs. The newest release of Libero IDE offers FPGA designers ease-of-use, design performance improvement, and silicon feature exploitation capabilities, enabling them to meet design objectives faster.

Synopsys Synplify and Synplify Pro Synthesis Tools for Lattice

Ken Cheung — Wed, 11 Aug 2010 11:04:21 +0000

Synopsys and Lattice Semiconductor have agreed to a multi-year extension to their agreement. Under the terms of the OEM agreement, Lattice Semiconductor will provide specific versions of Synopsys’ Synplify Pro and Synplify software as part of its programmable logic design environments (including the Lattice Diamond FPGA design platform). The logic synthesis partnership will benefit designers targeting Lattice CPLD and FPGA products.

SynaptiCAD Upgrades WaveFormer Lite

Ken Cheung — Tue, 10 Aug 2010 22:02:24 +0000

SynaptiCAD rolled out an upgraded version of WaveFormer Lite. WaveFormer Lite is an entry level tool that can generate VHDL and Verilog stimulus-based test benches for the Actel Libero design software and other FPGA/ASIC vendor flows without requiring any special runtime engines. WaveFormer Lite fits seamlessly into Actel’s design environment, automatically extracting signal information from your HDL design files, and producing HDL test bench code that can be used with any standard VHDL or Verilog simulator.

Analog Devices Mixed Signal Digital Pre-Distortion Development Board

Ken Cheung — Wed, 28 Jul 2010 11:01:02 +0000

Analog Devices (ADI) and Xilinx announced the MS-DPD (mixed-signal, digital pre-distortion) development platform. MS-DPD helps multi-carrier cellular base station manufacturers reduce engineering resources and improve time to market. Xilinx’s Virtex-6 FPGA ML605 (field-programmable gate array) Evaluation Kit connects to the MS-DPD board through an industry-standard VITA-57 FMC connector. Using this system, the FPGA can be used to implement required radio algorithms leveraging the ADI signal chain available on the MS-DPD. The ADI MS-DPD development boards are available now for $3,995 each.

Actel FlashPro4 Programmer for IGLOO, ProASIC3, SmartFusion, Fusion FPGA

Ken Cheung — Tue, 27 Jul 2010 19:09:18 +0000

Actel introduced FlashPro4 hardware programmer for IGLOO series and ProASIC3 series (including RT ProASIC3), SmartFusion and Fusion flash FPGA families. FlashPro4 also supports FPGA embedded software program and debug managed by Actel’s SoftConsole Integrated Design Environment (IDE) for embedded processors. Actel’s FlashPro4 programmer is now available for US $49. The kit includes a USB cable, a ribbon cable with 10-pin JTAG connector, and a quickstart card. The FlashPro software is available for free, either standalone or as part of all Actel Libero Integrated Design Environment (IDE) versions.

Xilinx ISE Design Suite 12.2 and Partial Reconfiguration FPGA Flow

Ken Cheung — Tue, 27 Jul 2010 16:37:59 +0000

Xilinx introduced ISE Design Suite 12.2 and the fourth generation partial reconfiguration design flow. ISE Design Suite 12.2 features lower power consumption, reduced overall system costs, and a low-cost simulation solution for the embedded design flow. ISE Design Suite 12.2 is now available for all ISE Editions with list prices starting at $2,995 for the Logic Edition. Fourth generation Partial Reconfiguration can be purchased as an option and is bundled with two days of onsite training.