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'Reference Design' Category Archive

LatticeXP2 Brevia Development Kit and Reference Designs

Posted by Ken Cheung in Reference Design,Tool on Monday, June 7, 2010

Lattice Semiconductor introduced the LatticeXP2 Brevia Development Kit and 28 new silicon-proven reference designs for developing high volume, cost sensitive, high density applications. The LatticeXP2 Brevia Development Kit features the LatticeXP2 LFXP2-5E-6TN144C device, 2Mb SPI Flash and 1Mb SRAM memory, expansion headers and several LEDs and user switches. Promotional pricing for the LatticeXP2 Brevia Development [...]

Eutecus Bi-i V401X-FP5500 Fusion Analytics Module Reference Design

Posted by Ken Cheung in Reference Design on Friday, June 4, 2010

Eutecus introduced the Bi-i V401X-FP5500 Fusion-Analytics Module Reference Design. The Eutecus’ Multi-core Video Analytics Engine (MVE) is implemented on a single low-cost FPGA — the Spartan 3A DSP. The Bi-i V401X-FP5500 is ideal for image processing applications in the military, aerospace and homeland security. The video analytics is performed in real time on a fused [...]

Xilinx Extensible Processing Platform for Embedded Systems

Posted by Ken Cheung in Reference Design on Tuesday, April 27, 2010

Xilinx announced the architecture for a new Extensible Processing Platform for embedded systems. The ARM Cortex-A9 MPCore processor-based platform enables system architects and embedded software developers to apply a combination of serial and parallel processing for embedded systems to perform complex functions. Xilinx’s new architecture abstracts much of the hardware burden away from the embedded [...]

Module Management Controller Board Management Reference Starter Kit

Posted by Ken Cheung in Reference Design on Monday, March 29, 2010

Pigeon Point Systems (PPS) introduced a Module Management Controller (MMC) Board Management Reference (BMR) Starter Kit for AdvancedMC (AMC) modules, which are used in both AdvancedTCA (ATCA) carriers and MicroTCA (uTCA) shelves, collectively referenced as xTCA. The MMC BMR Starter Kit is based on Actel’s SmartFusion intelligent mixed signal FPGAs. SmartFusion devices integrate an FPGA, [...]

Altera and Apical Video Surveillance Camera Reference Design

Posted by Ken Cheung in Reference Design on Thursday, March 25, 2010

Altera and Apical introduced the first high-definition wide dynamic range (WDR) CMOS image-sensor-processing solution for video-surveillance cameras. Altera and Apical’s reference design delivers excellent video-image quality regardless of varying lighting conditions, a major stumbling block for previous generations of surveillance cameras. The HD WDR CMOS image sensor features Altera’s Cyclone III and Cyclone IV FPGAs, [...]

3G, 4G Remote Radio Head Solution by Lattice Semiconductor, Affarii

Posted by Ken Cheung in Reference Design on Monday, October 26, 2009

Lattice Semiconductor and Affarii Technologies have developed a complete 3G/4G-based Remote Radio Head (RRH) solution for wireless infrastructure designers. This is the first time a full RRH solution has been made available using low power, low cost FPGAs that enables low power RRHs to be deployed without sacrificing flexibility or performance. The RRH solution is [...]

Lattice MachXO Control Development Kit

Posted by Ken Cheung in Reference Design,Tool on Monday, October 19, 2009

Lattice Semiconductor introduced the new MachXO Control Development Kit and 12 new reference designs for prototyping system control functions such as temperature and current monitoring, power supply sequencing, fan control and fault logging, that are commonly found in telecom infrastructure, server, industrial and medical applications. The MachXO kit enables the development of system control designs [...]

Reference Clock Solution for SERDES Applications

Posted by Ken Cheung in Reference Design on Monday, October 12, 2009

Lattice Semiconductor and Epson Toyocom teamed together on a low-cost reference clock solution for SERDES applications. The reference design features Lattice’s ispClock 5400D device and Epson Toyocom’s SG-710ECK CMOS oscillator. The 6-output ispClock5406D device is available for $2.95 in 10K piece volumes. The Epson Toyocom SG-710 is available for $0.95 in quantities of 10K piece [...]

Lattice Semiconductor ProcessorPM, ispMACH 4000ZE Pico Development Kits

Posted by Ken Cheung in Reference Design,Tool on Tuesday, September 8, 2009

Lattice Semiconductor introduced the ProcessorPM Development Kit, the ispMACH 4000ZE Pico Development Kit, and eight new reference designs. Pricing for the ispMACH 4000ZE Pico Development Kit is $69 and the ProcessorPM Development Kit is $49. The kits are ideal for prototyping high volume, cost sensitive, low power, space constrained applications. With Lattice’s low-cost programmable logic [...]

Achronix Speedster SPC60 Plug-In Card for SPD60 FPGA

Posted by Ken Cheung in Reference Design on Tuesday, August 4, 2009

Achronix Semiconductor introduced the Speedster SPC60 Plug-In Card for the Achronix SPD60 FPGA. The SPC60 development kit features a 1066 Mbps DDR3 reference design for out of the box integration with customer designs. The SPC60 embeds the 1066 Mbps DDR3 controllers in the SPD60 FPGA and eliminates difficult memory interface implementation and verification challenges. The [...]

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