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'Reference Design' Category Archive

Maxim 1-Wire Security Reference Design Protects Spartan-6 FPGA-Based Designs

Posted by Ken Cheung in Reference Design on Monday, April 30, 2012

Maxim Integrated Products introduced a reference design that will protect Xilinx Spartan-6 field-programmable gate arrays (FPGAs). The reference design features security software (from Maxim or Xilinx) and the Maxim DS28E01-100 1-Wire secure memory device. Engineers can easily add a level of design security to products with the Maxim DS28E01-100 1-Wire secure memory device. In the [...]

Microsemi Introduces SmartFusion LCD Display Reference Design

Posted by Ken Cheung in Reference Design on Wednesday, April 18, 2012

Microsemi recently introduced a LCD display reference design for industrial and medical applications. The reference design is based on the SmartFusion customizable system-on-chip. The SmartFusion cSoC integrates FPGA technology with a hardened ARM Cortex-M3 processor and programmable analog blocks. The SmartFusion display reference design source files and user’s guide are available now.

Lattice Semiconductor Introduces Sony IMX136 Image Sensor Bridge

Posted by Ken Cheung in Reference Design on Monday, March 26, 2012

Lattice Semiconductor introduced the Sony IMX136 image sensor bridge. The new image sensor bridge design utilizes the low power, low cost Lattice MachXO2 PLD (programmable logic device) to interface to the Sony IMX136 image sensor. The Sony IMX136 image sensor bridge design helps engineers to quickly introduce cameras based on the Sony IMX136. The image [...]

Lattice Semiconductor, Aptina Team on Dual Image Sensor Stereo Camera Reference Design

Posted by Ken Cheung in Reference Design on Friday, January 6, 2012

Lattice Semiconductor and Aptina will showcase a low cost, dual image sensor design at the Consumer Electronics Show (CES) in Las Vegas, January 10-13, 2012. The dual image sensor design helps ISP vendors to quickly offer multiple camera solutions for the consumer market. Lattice’s private hospitality meeting suite will be held in the Las Vegas [...]

Xilinx Targets 3D and 4K2K Displays with Reference Designs and ACDC Baseboard

Posted by Ken Cheung in FPGA-based Product,Reference Design,Tool on Thursday, January 5, 2012

Xilinx introduced reference designs and a development baseboard for speeding the development of next-generation, 3D and 4K2K display technologies. The 4K2K Mosaic and HDTV-to-4K2K up-converter targeted reference designs are based on the new 28nm Kintex-7 Field Programmable Gate Array (FPGA). The new ACDC (Acquisition, Contribution, Distribution and Consumption) 1.0 Baseboard also uses Kintex-7 FPGA devices. [...]

Valens HDBaseT Camera Reference Design

Posted by Ken Cheung in Reference Design on Monday, October 31, 2011

Valens Semiconductor introduced a HDBaseT camera reference design solution. The LatticeECP3 FPGA device can be used for multiplexing the video streams and formatting the data to the Valens HDBaseT Tx driver. The LatticeECP3 FPGA device has the necessary memory blocks, FPGA logic, SERDES and configurable I/O to implement a variety of applications. The LatticeECP3 FPGA [...]

Xilinx Acquires Modelware, Debuts 100G Traffic Management Reference Design

Posted by Ken Cheung in IP Core,Reference Design on Monday, May 9, 2011

Xilinx has acquired Modelware, which is a provider of traffic management/packet processing silicon intellectual property (IP) cores and reference designs that simplify system development and enable greater differentiation for networking applications supporting 10G, 40G, 100G and beyond. Xilinx also announced a FPGA-based 100G traffic management reference design for speeding evaluation and implementation of high bandwidth [...]

Xilinx Broadcast Real-Time Video Engine Targeted Design Platform

Posted by Ken Cheung in IP Core,Reference Design,Tool on Monday, April 11, 2011

Xilinx introduced their Broadcast Real-Time Video Engine Targeted Design Platform. The Real-Time Video Engine Targeted Design Platform consists of a broadcast-quality Video and Image Processing IP pack. The Xilinx Video and Imaging Processing IP pack is priced at $3,000 and will be available at the end of April. Xilinx also rolled out the SMPTE2022 IP [...]

LatticeXP2 HiSPi to Parallel Sensor Bridge Reference Design

Posted by Ken Cheung in Reference Design on Monday, April 4, 2011

Lattice Semiconductor introduced a HiSPi bridge reference design that supports Aptina’s High-Speed Serial Pixel Interface. The reference design is based on LatticeXP2 FPGA devices, which can support four HiSPi data lanes up to 700Mpbs. The HiSPi bridge solution enables an Image Signal Processor (ISP) with a CMOS parallel bus to interface with an Aptina HiSPi [...]

Xilinx Virtex-6 HXT FPGA Optical Transport Network Design Platform

Posted by Ken Cheung in Reference Design on Monday, March 7, 2011

Xilinx introduced the Virtex-6 HXT FPGA Optical Transport Network (OTN) Targeted Design Platform. The OTN Targeted Design Platform features a Virtex-6 HXT FPGA development board with pre-defined and implemented reference designs for different OTN solutions, such as 100G ODU switching from Xilinx, 100G Ethernet to OTU4 transponders and 10×10 to OTU4 transponders. The OTN platform [...]

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