Barco Silex BA411E Universal AES Crypto Engine
Barco Silex introduced BA411E, which is an enhanced version of their multi-purpose AES crypto engine. The BA411E IP core supports multi-pipelined architectures, multiple data path configurations, and a wide range of ciphering modes. With the universal AES crypto engine, S-boxes can be efficiently implement as simple logic for ASIC or as memories for FPGA. The [...]
Flexibilis Ethernet Switch IP Cores for LatticeECP3 FPGA Devices
Lattice Semiconductor and Flexibilis introduced Flexibilis Ethernet Switch (FES) IP cores for LatticeECP3 FPGAs. The Ethernet switch IP cores can operate at 10Mbps/100Mbps/1Gbps, support Ethernet Layer 2, switch with Gigabit forwarding capacity per port, support Quality of Service with up to four queues per port, and support Gigabit Fiber optic and Gigabit twisted pair copper [...]
Chip Path Semiconductor IP Centric Design for ASIC, FPGA, ASSP
Chip Path Design Systems introduced their new approach to semiconductor IP chip design. Their methodology focuses on a common Semantic-IC Specification with the ability to map to multiple implementation styles and understanding of complete project costs. Their Semiconductor IP Centric Design results in visibility of timelines and costs across ASIC (Application Specific Integrated Circuit), FPGA [...]
Xilinx Goes Shopping Again, Acquires Sarance Technologies
Xilinx has acquired Sarance Technologies. The acquisition will help Xilinx increase and accelerate the displacement of ASSPs and ASICs in many 40G/100G and beyond programs. Sarance Technologies is a supplier of ASIC and FPGA IP cores for packet processing. The cores include Interlaken IP, classification and traffic management IP.
Xilinx Acquires Modelware, Debuts 100G Traffic Management Reference Design
Xilinx has acquired Modelware, which is a provider of traffic management/packet processing silicon intellectual property (IP) cores and reference designs that simplify system development and enable greater differentiation for networking applications supporting 10G, 40G, 100G and beyond. Xilinx also announced a FPGA-based 100G traffic management reference design for speeding evaluation and implementation of high bandwidth [...]
Oregano IEEE-1588 IP Cores for LatticeECP3, LatticeECP2M FPGA Devices
Lattice Semiconductor and Oregano Systems introduced IEEE-1588 Timing Node System IP cores for the LatticeECP3 and LatticeECP2M FPGA families. The SoC-class IP cores are syn1588 Clock_S, syn1588 Clock_M, and syn1588 VIP. The syn1588 VIP is a single chip IEEE 1588 solution. The syn1588 Clock_S IP core offers the full syn1588 technology with a minimum amount [...]
MP32 MIPS-based Soft Core Processor for Altera FPGA and ASIC Devices
Altera, MIPS Technologies and System Level Solutions (SLS) teamed together on the MP32 soft core processor. The MP32 is a MIPS-based, FPGA-optimized soft processor for Altera’s FPGA and ASIC devices. The MP32 processor is available now from SLS. The soft processor is royalty free and sold on an unlimited use basis when targeting Altera’s FPGA [...]
Lattice Serial RapidIO 2.1 Endpoint IP Core Supports 4 x 3.125Gbps
Lattice Semiconductor has extended the Serial RapidIO 2.1, Level 1 endpoint core to support 4 x 3.125Gbps. The previous version of the LatticeECP3 FPGA IP core supported 1x and 2x up to 3.125Gbps and 4x up to 2.5Gbps. The Lattice core can be used with the Lattice Advanced Mezzanine Card (AMC) form factor platform. The [...]
PLDA EZDMA IP Solution
The PLDA’s EZDMA IP is a DMA solution. The IP features a vendor-agnostic user interface and seamless device migration. It is configurable for resource optimization and customizable to fit specific customer requirements. The PLDA EZDMA solution supports the Aldec Riviera-PRO for Linux and Active-HDL for Windows verification tools for FPGA development. PLDA’s EZDMA IP solution [...]
Xilinx Broadcast Real-Time Video Engine Targeted Design Platform
Xilinx introduced their Broadcast Real-Time Video Engine Targeted Design Platform. The Real-Time Video Engine Targeted Design Platform consists of a broadcast-quality Video and Image Processing IP pack. The Xilinx Video and Imaging Processing IP pack is priced at $3,000 and will be available at the end of April. Xilinx also rolled out the SMPTE2022 IP [...]
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