FPGA Blog » IP Core

Spartan-6 FPGA Broadcast Connectivity Kit, Processing Engine IP Core

Ken Cheung — Fri, 10 Sep 2010 17:55:38 +0000

Xilinx introduced the Spartan-6 FPGA Broadcast Connectivity Kit and Broadcast Processing Engine IP core. The development platform is ideal for engineers working on 3D TV broadcast and other high definition video applications. The Xilinx Spartan-6 FPGA Broadcast Connectivity Kit and Broadcast Processing Engine IP core enable broadcast system designers to build full systems for high-speed transmission and real-time processing of video in a full range of professional broadcast applications (such as cameras, switchers, routers, encoders, monitors and cinema projectors).

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Coreworks Audio Codec IP Cores for Xilinx FPGA Devices

Ken Cheung — Fri, 10 Sep 2010 17:17:44 +0000

Xilinx and Coreworks teamed on a range of new Dolby audio technology and other audio codec IP cores for compressing multichannel audio in Field Programmable Gate Arrays (FPGAs). The IP cores are available from Coreworks starting in October at a cost starting at $10,000, with additional licensing fees for the Dolby cores. Bundles are available that combine different IP cores.

Xilinx Virtex-5Q FPGA Solution for High-Grade Cryptographic Processing

Ken Cheung — Wed, 08 Sep 2010 11:34:11 +0000

The National Security Agency (NSA) has approved Xilinx’s programmable aerospace and defense solution for use in Type 1 Crypto Systems. The approval of the Virtex-5Q FPGA device and related physical security IP core, which together help form the Xilinx Targeted Design Platform for secure communications, extends an on-going relationship between the NSA and Xilinx. Xilinx’s solution enables developers to meet the demanding requirements of high-grade cryptographic processing applications, including the requirements set forth by the Department of Defense’s (DoD) Crypto Modernization initiatives.

EnSilica eSi-RISC Validates with Precision Synthesis FPGA Design Flow

Ken Cheung — Thu, 22 Jul 2010 11:04:29 +0000

EnSilica’s range of eSi-RISC embedded processor cores and eSi-Comms library of communications IP has been fully validated for use in Mentor Graphics’ Precision Synthesis FPGA design flow, enabling design engineers to easily implement them on any FPGA device. eSi-RISC’s single architecture is scalable over a range of embedded applications. A high level of configurability enables hardware resources to be optimized to application requirements, minimizing area and power to a level not possible with a general purpose processor architecture. The highly pipelined nature of the design gives engineers a solution that can be migrated between FPGA types or even to ASIC technologies.

Actel CoreFFT v4.0 Fast Fourier Transform IP Core

Ken Cheung — Tue, 20 Jul 2010 11:33:55 +0000

Actel introduced CoreFFT v4.0 intellectual property (IP) core for Fast Fourier Transform (FFT). CoreFFT v4.0 makes use of radiation-protected, multiply-accumulate blocks embedded on-chip in Actel’s radiation-tolerant RTAX-DSP FPGA devices to deliver a flexible, fully configurable radix-2 decimation-in-time (DIT) burst I/O FFT for high reliability, radiation-tolerant applications. CoreFFT v4.0 is now available for ordering. The Actel CoreFFT IP core is ideal for audio, digital communications, measurements, control and biomedical.

Actel CoreFIR v4.0 IP Core Generator for RTAX-DSP FPGA Devices

Ken Cheung — Mon, 19 Jul 2010 16:50:56 +0000

CoreFIR v4.0, from Actel, is a core generator for finite impulse response (FIR) filters. The core generator uses a distributed arithmetic implementation methodology to create FPGA-based digital filters. CoreFIR v4.0 is optimized for use with Actel RTAX-DSP devices and leverages the FPGA’s embedded radiation-tolerant multiply-accumulate blocks. The IP core is ideal for radar, sonar, ultrasound, communications, medical, industrial, and military markets. CoreFIR v4.0 is now available.

Helion IONOS Video Pipeline IP for Lattice FPGA Devices

Ken Cheung — Tue, 06 Jul 2010 17:18:59 +0000

Lattice Semiconductor and Helion GmbH teamed on Intellectual Property (IP) cores for the video security and surveillance camera market. Helion’s IONOS video pipeline IP and Vesta evaluation platform targets the LatticeXP2, LatticeECP2M, and LatticeECP3 FPGA families. The Helion Vesta evaluation platform is a completely self-contained platform that enables the development and realization of image pipelines for camera systems, especially in tight form-factor video security applications such as network IP and dome cameras.

Tokyo Electron Device MECHATROLINK-III IP Core for Xilinx Spartan-6 FPGA

Ken Cheung — Thu, 17 Jun 2010 23:50:57 +0000

Tokyo Electron Device has developed an IP core compatible with the MECHATROLINK-III standard for implementation with the low-cost Xilinx Spartan-6 FPGA family. The MECHATROLINK-III specification is an open motion field network communications standard established by the Iruma, Saitama Prefecture, Japan-based MECHATROLINK Members Association. Tokyo Electron Device’s MECHATROLINK-III compliant IP core for Spartan-6 FPGAs will be available in the third quarter of this year.

PLDA XpressRich3 PCI Express 3.0 Based IP Core for FPGA, ASIC Devices

Ken Cheung — Wed, 09 Jun 2010 11:02:24 +0000

PLDA introduced the XpressRich3 IP core for FPGAs and ASICs based on the forthcoming PCIe 3.0 specification, currently under development within the PCI-SIG. The PLDA XpressRich3 core features an architecture that seamlessly allows both ASIC and FPGA implementations. The PLDA XpressRich3 IP will be available for review at the PCI-SIG Developers Conference, which will be held on June 23-24, 2010 in Santa Clara, California.

Actel Libero Features Access to Over 50 IP Cores

Ken Cheung — Mon, 07 Jun 2010 17:54:43 +0000

Actel’s Libero Gold and Platinum editions now include access to over fifty IP cores. The Libero Gold Edition, which supports Actel FPGAs up to 1.5 million system gates, includes obfuscated versions of the Actel IP cores that can be easily used in designs but cannot be modified. The Libero Platinum edition supports Actel FPGA devices above 1.5 million system gates, such as AGLE3000, M1AGLE3000, A3PE3000, M1A3PE3000, A3PE3000L, RT3PE3000L, RTAX2000S, RTAX4000S, RTAX2000D, RTAX4000D, and AX2000.