Category Archives: Other

LDRA Tool Suite Supports Direct Integration with Altera Nios II Embedded Design Suite

Earlier in the week, LDRA announced that they have enhanced the LDRA tool suite to support direct integration with Altera’s Embedded Design Suite (EDS) for Nios II soft core processors. The LDRA tool suite features templates tailored to specific industry and programming standards. These are delivered pre-populated with standard requirements, simplifying compliance for developers. Combined with the cost-reduced Nios II platform, LDRA tool suite helps reduce the cost of embedded systems in industries such as automotive, medical, and avionics.

Continue reading

Aldec ALINT 2012.01 Includes Documentation Support for Safety-Critical Designs

Aldec rolled out ALINT 2012.01. The latest version features documentation support that addresses the strict guidelines placed on various safety-critical industries such as DO-254 for avionics, IEC 61508/61513 for nuclear and ISO 26262 for automotive. The ability to generate a report with complete analysis of detected violations and justification of waivers can help engineers decrease the effort in documentation and reporting. ALINT 2012.01 with support for VHDL or Verilog DO-254 design rule plug-in is available now.

Continue reading

Cornell University Students Create Interesting FPGA Projects

Every year, the brilliant students at Cornell University work on some fabulous projects for their ECE 5760. The students were given the responsibility of choosing their project, then designing and building it. Projects were built using the Altera/Terasic DE2 Development and Education board. This year’s projects include: prime number generator and RSA encrypter/decrypter, Conway’s life synthesizer, hand video-tracking virtual piano and drums, finger video-tracking virtual string instrument, and hand video-tracking video game.

Continue reading

Xilinx ISE Design Suite v13.2 Supports 28nm 7 FPGA Devices

Xilinx rolled out version 13.2 of their ISE Design Suite. The latest version features 28nm 7 series support, 25% performance improvement for designs targeting Virtex-7 2000T FPGA devices, PlanAhead design and analysis tool enhancements, partial reconfiguration support for Virtex-7 and Kintex-7 FPGAs, and front-to-back, integrated project management environment. ISE Design Suite 13 is available now. Prices start at $2,995 for the Logic Edition.

Continue reading

Silicon Laboratories Si51x XO and VCXO Crystal Oscillators

Silicon Laboratories introduced the Si51x XO/VCXO family of crystal oscillators (XOs) and voltage-controlled XOs (VCXOs). The Si512/3 dual-frequency XO devices can replace two discrete XOs and a multiplexer in networking, broadcast video and other applications that use multi-rate SerDes devices and FPGA devices. Si510/511 single-frequency XO is priced from $2.10 to $3.69 (in 10,000-unit quantities). Pricing for the Si514 I2C-programmable XO is $2.71 to $10.23 (in 10,000-unit quantities). Silicon Labs’ Si51x XO/VCXO family is ideal for networking, communications, storage, server, embedded computing and broadcast video systems.

Continue reading

FPGA-based Prototyping Methodology Manual by Synopsys and Xilinx

Synopsys and Xilinx teamed on the FPGA-based Prototyping Methodology Manual (FPMM): Best Practices in Design-for-Prototyping. The manual covers all aspects of FPGA-based prototyping, including understanding the challenges and benefits of prototyping, the implementation of a SoC design in FPGA, and its use for software and system validation. FPMM is a practical guide to using FPGAs as a platform for system-on-chip (SoC) development. Engineering teams from BBC Research & Development, Design of System on Silicon (DS2), Freescale Semiconductor, LSI, NVIDIA, STMicroelectronics, and Texas Instruments (TI) contributed to the book.

Continue reading

The Altera Embedded Initiative

Altera introduced their Embedded Initiative, which will give designers a single FPGA design flow based on the Quartus II development software. The design flow features the Qsys system-level integration tool, a common FPGA intellectual property (IP) library, and the ARM Cortex-A9 MPCore and MIPS Technologies MIPS32 embedded processors. The Qsys system-level integration tool leverages FPGA-optimized network-on-a-chip technology to support a wide variety of industry-standard IP protocols.

Continue reading

RoweBots Unison Ultra Tiny Linux RTOS for Actel SmartFusion FPGA

The RoweBots Unison ultra tiny Linux compatible OS is now available for Actel SmartFusion devices. Thanks to the partnership, developers now have the option for Linux-based embedded systems when using SmartFusion intelligent mixed signal FPGAs. Unison consists of a set of modular software components that are either free or commercially licensed. All Unison versions are strictly tested with standardized POSIX test suites. Unison includes over 30 demonstration programs that work out of the box in ten minutes with SoftConsole.

Continue reading

Opal Kelly Experts Program

Opal Kelly introduced the Opal Kelly Experts Program. The program features expert consultants to augment in-house expertise and bandwidth for completing FPGA and FrontPanel-based development. The consultants in the Opal Kelly Expert Program have been selected for their expertise in HDL, FPGA, and software design. The founding consultants of the Opal Kelly Expert Program are Kevin Smith, Klaus Zietlow, and Rainer Malzbender.

Continue reading

Altera TUV-Qualified Industrial Safety Data Package

Altera introduced an industrial safety data package for automation applications. Altera created a pre-qualified development tool chain, including safety manuals and safety intellectual property (IP) cores. The Altera solution will shorten development time and lower total system cost in safety-critical industrial applications, such as servo and inverter drives, safety devices, and automation controllers. Altera’s industrial safety data package will be available early in the second quarter of this year.

Continue reading