TEK Microsystems QuiXilica Proteus-V5 VXS Digitizer Board
TEK Microsystems introduced the Proteus-V5, the latest member of the QuiXilica-V5 product family. The Proteus-V5 features two 10-bit analog-to-digital converter (ADC) channels, each operating at up to 5.0 GSPS (Giga samples per second). The Proteus-V5 is compatible with legacy VME systems as well as newer ANSI/VITA 41 VXS based systems and combines high density FPGA [...]
X6-RX PCIe XMC Module with Xilinx Virtex-6 FPGA
Innovative Integration introduced the X6-RX PCIe XMC module. The X6-RX is a receiver that integrates IF digitizing with signal processing on an XMC IO module. The X6-RX PCIe module features a Xilinx Virtex-6 FPGA signal processing core, up to 24 configurable receiver channels, and a high performance PCI Express/PCI host interface. The XMC module enables [...]
MEN Micro D602 Triple Redundant 6U cPCI PowerPC Single Board Computer
MEN Micro announced the 6U FPGA-based, triple-redundant D602 CompactPCI (cPCI) single board computer (SBC). The D602 board uses a lock-step architecture which provides a redundant computing system that runs the same set of operations in parallel, so the programming only views hardware components once. The MEN Micro module is ideal for highly mission-critical applications as [...]
Varisys VM60 Dual Virtex-6 XMC Module
The VM60, from Varisys, is an XMC module. The VM60 board features two Virtex-6 FPGA devices and conforms to the VITA42.0 standard. The VM60 provides users with the simplest way to add huge FPGA based processing power to embedded systems. The FPGA processing resources on the VM60 can be used to implement complex algorithms such [...]
NTT Decoder LSI FPGA for 10-bit 4:2:2 H.264 and MPEG-2
NTT Electronics has developed a FPGA version of a multi-standard single chip LSI for both H.264/AVC 4:2:2 10-bit (including AVC-Intra 100/50) and MPEG-2 4:2:2 decoding. The 1080p 60 FPGA version will be released in the first quarter of 2011. By 2012, NTT Electronics expects to have over 10 models of next-generation H.264/AVC encoder/decoder LSIs.
QPACE Supercomputer Features Xilinx Virtex-5 LX110T FPGA Devices
The QPACE supercomputer, which features Xilinx Virtex-5 LX110T FPGA devices, is used in the study of Quantum Chromodynamics. The main simulation process used to model Quantum Chromodynamics is known as Lattice QCD and is only possible using high-powered, highly parallel supercomputers. Xilinx Virtex-5 LX110T FPGAs were selected to provide core networking technology in QPACE.
Reflex Photonics LA-T12-P418SM, LA-R12-P418SM LightABLE Optical Engines
Reflex Photonics introduced the LA-T12-P418SM and LA-R12-P418SM 10 Gbps LightABLE Surface Mount 12 channel Parallel Fiber Optic Engines. The two new optical transceiver products require only 2.3 cm2 of board space and consume only 42 mW of power per channel. The optical engines are capable of transmitting or receiving 120 gigabits of optical data per [...]
Vitesse 40G and 100G CI-BCH eFEC for ASIC and FPGA Implementation
Vitesse Semiconductor introduced their patented Continuously Interleaved BCH (CI-BCH) enhanced forward error correction (eFEC) technology for implementation in ASICs or FPGAs. According to Vitesse, their CI-BCH eFEC code offers the highest performing hard decision eFEC available and is the industry’s only eFEC implementable in FPGA form at 100G. Vitesse’s CI-BCH eFEC enables both 40G and [...]
TI ADS1675 Reference Design Features Opal Kelly XEM3010-1500P FPGA Module
The Opal Kelly XEM3010-1500P FPGA module is a as a key component of Texas Instruments’ new ADS1675 Reference Design evaluation platform. The Opal Kelly XEM module enables both LVDS and CMOS serial interfaces and provides on-board SDRAM and high-speed USB interface for the TI Reference Design. The XEM3010-1500P is an integration module based on a [...]
Pico Computing Achieves 280 Billion Keys/sec for 56-bit DES Decryption
Pico Computing has achieved a throughput of over 280 billion keys per second using a single, hardware-accelerated server. According to Pico Computing, this is the highest-known benchmark speeds for 56-bit DES decryption. The FPGA computing platform assembled by Pico Computing for this demonstration, based on 11 Pico EX-Series cards, reportedly consumes less than 1000 peak [...]
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