Category Archives: FPGA

field programmable gate arrays, fpgas, programmable logic devices, plds, cplds, complex programmable logic devices

Lattice Semiconductor Introduces MachXO3 FPGA Family

Lattice Semiconductor recently introduced their ultra-low density MachXO3 Field Programmable Gate Array family. The new FPGA devices are the world’s smallest, lowest-cost-per I/O programmable platform aimed at expanding system capabilities and bridging emerging connectivity interfaces using both parallel and serial I/O. First production of the MachXO3 device shipments are scheduled for the end of 2013. Prices start below $1 in high volume.

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Xilinx JESD204 LogiCORE IP Achieves Interoperability with ADI AD9250

Xilinx and Analog Devices have achieved JESD204B interoperability between Xilinx JESD204 LogiCORE IP in the Kintex-7 FPGA and the ADI AD9250 analog-to-digital high-speed data converter. The results confirm that off-the-shelf ADI JESD204B data converters and Xilinx FPGAs work together seamlessly. The interoperability means manufacturers can take advantage of JESD204B to accelerate time-to-market for their new products by shortening development time, reducing system test effort, and minimizing development issues.

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Altera, Micron Demonstrate Stratix FPGA and Hybrid Memory Cube Interoperability

Altera and Micron Technology have successfully demonstrated interoperability between Altera Stratix V FPGAs and Micron’s Hybrid Memory Cube (HMC). This technology achievement enables system designers to evaluate today the benefits of HMC with FPGAs and SoCs for next-generation communications and high-performance computing designs. The demonstration provides an early proof point that production support of HMC will be delivered with Altera’s Generation 10 portfolio — includes both Stratix 10 and Arria 10 FPGAs and SoCs.

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Xilinx Implements First UltraScale ASIC Class Programmable Architecture

Xilinx UltraScale Architecture

Xilinx has taped out the semiconductor industry’s first 20nm device, and the PLD industry’s first 20nm All Programmable device. In addition, Xilinx has also implemented the industry’s first ASIC-class programmable architecture called UltraScale. According to Xilinx, the company is about a year ahead in delivering 1.5–2X more realizeable system-level performance and integration.

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Microsemi Launches IGLOO2 Field Programmable Gate Array Family

Microsemi IGLOO2 FPGA family

Microsemi launched their IGLOO2 field programmable gate array family. The new FPGA devices are ideal for industrial, commercial aviation, defense, communications and security applications. Pricing for IGLOO2 starts at less than $7 for high volume orders. The M2GL050 is shipping in volume production now with subsequent device configurations rolling out throughout 2013 and early 2014. IGLOO2 FPGAs will be available in extended temperature offerings of up to 125 degrees centigrade temperature junction.

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