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	<title>FPGA Blog &#187; Event</title>
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	<link>http://fpgablog.com</link>
	<description>FPGA (field programmable gate array) and structured ASIC information</description>
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		<title>X-fest 2012 Technical Seminars to Take Place in 22 Cities Worldwide</title>
		<link>http://fpgablog.com/posts/avnet-xilinx-xfest-2012/</link>
		<comments>http://fpgablog.com/posts/avnet-xilinx-xfest-2012/#comments</comments>
		<pubDate>Tue, 07 Feb 2012 17:30:09 +0000</pubDate>
		<dc:creator>Ken Cheung</dc:creator>
				<category><![CDATA[Event]]></category>
		<category><![CDATA[Artix-7]]></category>
		<category><![CDATA[Avnet Electronics Marketing]]></category>
		<category><![CDATA[FPGA]]></category>
		<category><![CDATA[Kintex-7]]></category>
		<category><![CDATA[Technical Seminars]]></category>
		<category><![CDATA[training]]></category>
		<category><![CDATA[Virtex-7]]></category>
		<category><![CDATA[X-fest]]></category>
		<category><![CDATA[Xilinx]]></category>
		<category><![CDATA[Zynq-7000]]></category>

		<guid isPermaLink="false">http://fpgablog.com/?p=3639</guid>
		<description><![CDATA[Avnet Electronics Marketing and Xilinx are co-hosting X-fest 2012, which is a series of free, day-long seminars in North America, Europe, Asia and Japan. X-fest 2012 features twelve technical courses based on Xilinx&#8217;s new Artix-7, Kintex-7 and Virtex-7 FPGAs, and Zynq-7000 Extensible Processing Platform (EPP) family. The global event will also include hands-on demonstrations from [...]]]></description>
			<content:encoded><![CDATA[<p>Avnet Electronics Marketing and Xilinx are co-hosting X-fest 2012, which is a series of free, day-long seminars in North America, Europe, Asia and Japan. X-fest 2012 features twelve technical courses based on Xilinx&#8217;s new Artix-7, Kintex-7 and Virtex-7 FPGAs, and Zynq-7000 Extensible Processing Platform (EPP) family. The global event will also include hands-on demonstrations from Analog Devices, Cypress, Freescale Semiconductor, Maxim, Micron Technology, TE Connectivity, and Texas Instruments (TI). X-fest 2012 will take place in 22 cities around the world.</p>
<p><p>Read more <a href="http://fpgablog.com/posts/avnet-xilinx-xfest-2012/">X-fest 2012 Technical Seminars to Take Place in 22 Cities Worldwide</a></p><p align="center"><a href="http://api.tweetmeme.com/share?url=http://fpgablog.com/posts/avnet-xilinx-xfest-2012/"><img src="http://api.tweetmeme.com/imagebutton.gif?url=http://fpgablog.com/posts/avnet-xilinx-xfest-2012/" height="61" width="51" /></a></p>
<p align="center"><a href="http://twitter.com/fpgablog">Twitter @fpgablog</a> : : <a href="http://embeddedstar.tradepub.com/">Free Trade Publications</a> : : <a href="http://www.embeddedstar.com/careers/">Jobs</a> : : <a href="http://fpgablog.com/">FPGA Blog</a> : : <a href="http://edablog.com/">EDA Blog</a> : : <a href="http://www.embeddedstar.com/">Embedded Star</a> : : <a href="http://edageek.com/">EDA Geek</a> : : <a href="http://daddyforever.com/">Dad Blog</a><br />© 2012 <a href="http://www.onlinedestiny.com/">Online Destiny Ltd</a> : : FPGA Blog is a trademark of Online Destiny Ltd</p>]]></content:encoded>
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		</item>
		<item>
		<title>Xilinx to Discuss Stacked Silicon Interposer Technology at DesignCon 2012</title>
		<link>http://fpgablog.com/posts/zynq-7000-3d-ic/</link>
		<comments>http://fpgablog.com/posts/zynq-7000-3d-ic/#comments</comments>
		<pubDate>Fri, 27 Jan 2012 16:33:13 +0000</pubDate>
		<dc:creator>Ken Cheung</dc:creator>
				<category><![CDATA[Event]]></category>
		<category><![CDATA[28nm]]></category>
		<category><![CDATA[7 Series]]></category>
		<category><![CDATA[DesignCon]]></category>
		<category><![CDATA[FPGAs]]></category>
		<category><![CDATA[Interconnect]]></category>
		<category><![CDATA[Panel]]></category>
		<category><![CDATA[papers]]></category>
		<category><![CDATA[Stacked Silicon]]></category>
		<category><![CDATA[Xilinx]]></category>
		<category><![CDATA[Zynq-7000]]></category>

		<guid isPermaLink="false">http://fpgablog.com/?p=3608</guid>
		<description><![CDATA[At DesignCon 2012, Xilinx will discuss the benefits and drawbacks of 3D IC standards. Xilinx will also present papers on Stacked Silicon interposer technology and the design benefits of using the Zynq-7000 Extensible Processing Platform (EPP). In addition, Xilinx will also demonstrate the latest Xilinx FPGA platforms featuring advanced Digital Signal Processing (DSP) performance, low [...]]]></description>
			<content:encoded><![CDATA[<p>At DesignCon 2012, Xilinx will discuss the benefits and drawbacks of 3D IC standards. Xilinx will also present papers on Stacked Silicon interposer technology and the design benefits of using the Zynq-7000 Extensible Processing Platform (EPP). In addition, Xilinx will also demonstrate the latest Xilinx FPGA platforms featuring advanced Digital Signal Processing (DSP) performance, low power, FMC migration, high-speed connectivity, and Xilinx&#8217;s Agile Mixed Signal (AMS) Analog-to-Digital Converter (ADC). DesignCon 2012 will take place January 30 &#8211; February 2, 2012 in Santa Clara, California.</p>
<p><p>Read more <a href="http://fpgablog.com/posts/zynq-7000-3d-ic/">Xilinx to Discuss Stacked Silicon Interposer Technology at DesignCon 2012</a></p><p align="center"><a href="http://api.tweetmeme.com/share?url=http://fpgablog.com/posts/zynq-7000-3d-ic/"><img src="http://api.tweetmeme.com/imagebutton.gif?url=http://fpgablog.com/posts/zynq-7000-3d-ic/" height="61" width="51" /></a></p>
<p align="center"><a href="http://twitter.com/fpgablog">Twitter @fpgablog</a> : : <a href="http://embeddedstar.tradepub.com/">Free Trade Publications</a> : : <a href="http://www.embeddedstar.com/careers/">Jobs</a> : : <a href="http://fpgablog.com/">FPGA Blog</a> : : <a href="http://edablog.com/">EDA Blog</a> : : <a href="http://www.embeddedstar.com/">Embedded Star</a> : : <a href="http://edageek.com/">EDA Geek</a> : : <a href="http://daddyforever.com/">Dad Blog</a><br />© 2012 <a href="http://www.onlinedestiny.com/">Online Destiny Ltd</a> : : FPGA Blog is a trademark of Online Destiny Ltd</p>]]></content:encoded>
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		</item>
		<item>
		<title>Altera to Share Solutions at DesignCon 2012</title>
		<link>http://fpgablog.com/posts/dsp-signal-integrity/</link>
		<comments>http://fpgablog.com/posts/dsp-signal-integrity/#comments</comments>
		<pubDate>Wed, 25 Jan 2012 18:44:04 +0000</pubDate>
		<dc:creator>Ken Cheung</dc:creator>
				<category><![CDATA[Event]]></category>
		<category><![CDATA[28nm]]></category>
		<category><![CDATA[altera]]></category>
		<category><![CDATA[DesignCon]]></category>
		<category><![CDATA[DSP]]></category>
		<category><![CDATA[Floating Point]]></category>
		<category><![CDATA[FPGA]]></category>
		<category><![CDATA[Signal Integrity]]></category>

		<guid isPermaLink="false">http://fpgablog.com/?p=3602</guid>
		<description><![CDATA[At DesignCon 2012, Altera will showcase how they are solving some of the industry&#8217;s most complex design challenges through 28nm FPGA architectural innovations and advanced technologies that enable high-speed I/O performance, floating point DSP and best-in-class signal integrity. Altera will participate on industry panels, conduct a TechForum tutorial and present nine conference papers. DesignCon will [...]]]></description>
			<content:encoded><![CDATA[<p>At DesignCon 2012, Altera will showcase how they are solving some of the industry&#8217;s most complex design challenges through 28nm FPGA architectural innovations and advanced technologies that enable high-speed I/O performance, floating point DSP and best-in-class signal integrity. Altera will participate on industry panels, conduct a TechForum tutorial and present nine conference papers. DesignCon will take place January 30 to February 2, 2012 at the Santa Clara Convention Center in California.</p>
<p><p>Read more <a href="http://fpgablog.com/posts/dsp-signal-integrity/">Altera to Share Solutions at DesignCon 2012</a></p><p align="center"><a href="http://api.tweetmeme.com/share?url=http://fpgablog.com/posts/dsp-signal-integrity/"><img src="http://api.tweetmeme.com/imagebutton.gif?url=http://fpgablog.com/posts/dsp-signal-integrity/" height="61" width="51" /></a></p>
<p align="center"><a href="http://twitter.com/fpgablog">Twitter @fpgablog</a> : : <a href="http://embeddedstar.tradepub.com/">Free Trade Publications</a> : : <a href="http://www.embeddedstar.com/careers/">Jobs</a> : : <a href="http://fpgablog.com/">FPGA Blog</a> : : <a href="http://edablog.com/">EDA Blog</a> : : <a href="http://www.embeddedstar.com/">Embedded Star</a> : : <a href="http://edageek.com/">EDA Geek</a> : : <a href="http://daddyforever.com/">Dad Blog</a><br />© 2012 <a href="http://www.onlinedestiny.com/">Online Destiny Ltd</a> : : FPGA Blog is a trademark of Online Destiny Ltd</p>]]></content:encoded>
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		</item>
		<item>
		<title>Ben Heck Show Brightens Up LED Displays with FPGAs and CPLDs</title>
		<link>http://fpgablog.com/posts/element14-show/</link>
		<comments>http://fpgablog.com/posts/element14-show/#comments</comments>
		<pubDate>Mon, 05 Dec 2011 05:01:59 +0000</pubDate>
		<dc:creator>Ken Cheung</dc:creator>
				<category><![CDATA[Event]]></category>
		<category><![CDATA[CPLDs]]></category>
		<category><![CDATA[element14]]></category>
		<category><![CDATA[FPGAs]]></category>
		<category><![CDATA[LED displays]]></category>
		<category><![CDATA[The Ben Heck Show]]></category>

		<guid isPermaLink="false">http://fpgablog.com/?p=3518</guid>
		<description><![CDATA[In the latest Ben Heck Show episode, the modding guru discusses the benefits of using Field Programmable Gate Arrays (FPGAs) and Complex Programmable Logic Devices (CPLDs) to enhance LED-illumination projects. In the episode, Ben deconstructs the complex language of programmable logic devices as a means to help designers expedite their current builds as efficiently as [...]]]></description>
			<content:encoded><![CDATA[<p>In the latest Ben Heck Show episode, the modding guru discusses the benefits of using Field Programmable Gate Arrays (FPGAs) and Complex Programmable Logic Devices (CPLDs) to enhance LED-illumination projects. In the episode, Ben deconstructs the complex language of programmable logic devices as a means to help designers expedite their current builds as efficiently as possible.</p>
<p><p>Read more <a href="http://fpgablog.com/posts/element14-show/">Ben Heck Show Brightens Up LED Displays with FPGAs and CPLDs</a></p><p align="center"><a href="http://api.tweetmeme.com/share?url=http://fpgablog.com/posts/element14-show/"><img src="http://api.tweetmeme.com/imagebutton.gif?url=http://fpgablog.com/posts/element14-show/" height="61" width="51" /></a></p>
<p align="center"><a href="http://twitter.com/fpgablog">Twitter @fpgablog</a> : : <a href="http://embeddedstar.tradepub.com/">Free Trade Publications</a> : : <a href="http://www.embeddedstar.com/careers/">Jobs</a> : : <a href="http://fpgablog.com/">FPGA Blog</a> : : <a href="http://edablog.com/">EDA Blog</a> : : <a href="http://www.embeddedstar.com/">Embedded Star</a> : : <a href="http://edageek.com/">EDA Geek</a> : : <a href="http://daddyforever.com/">Dad Blog</a><br />© 2011 <a href="http://www.onlinedestiny.com/">Online Destiny Ltd</a> : : FPGA Blog is a trademark of Online Destiny Ltd</p>]]></content:encoded>
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		</item>
		<item>
		<title>Webinar: How to Achieve the Highest NAND Flash Application Data Rate</title>
		<link>http://fpgablog.com/posts/cast-evatronix-webcast/</link>
		<comments>http://fpgablog.com/posts/cast-evatronix-webcast/#comments</comments>
		<pubDate>Mon, 21 Nov 2011 15:32:34 +0000</pubDate>
		<dc:creator>Ken Cheung</dc:creator>
				<category><![CDATA[Event]]></category>
		<category><![CDATA[Application Data]]></category>
		<category><![CDATA[CAST]]></category>
		<category><![CDATA[Evatronix]]></category>
		<category><![CDATA[NAND Flash]]></category>
		<category><![CDATA[online seminar]]></category>
		<category><![CDATA[webcast]]></category>
		<category><![CDATA[webinar]]></category>

		<guid isPermaLink="false">http://fpgablog.com/?p=3481</guid>
		<description><![CDATA[CAST and Evatronix will host a webinar about using CAST&#8217;s new NAND Flash Controller Core as part of an overall design strategy to achieve the highest possible memory data input and output rates for advanced applications. The webcast will take place Wednesday, November 30, 2011 at 1:00 PM EST. The online seminar is free, but [...]]]></description>
			<content:encoded><![CDATA[<p>CAST and Evatronix will host a webinar about using CAST&#8217;s new NAND Flash Controller Core as part of an overall design strategy to achieve the highest possible memory data input and output rates for advanced applications. The webcast will take place Wednesday, November 30, 2011 at 1:00 PM EST. The online seminar is free, but you need to register in advance.</p>
<p><p>Read more <a href="http://fpgablog.com/posts/cast-evatronix-webcast/">Webinar: How to Achieve the Highest NAND Flash Application Data Rate</a></p><p align="center"><a href="http://api.tweetmeme.com/share?url=http://fpgablog.com/posts/cast-evatronix-webcast/"><img src="http://api.tweetmeme.com/imagebutton.gif?url=http://fpgablog.com/posts/cast-evatronix-webcast/" height="61" width="51" /></a></p>
<p align="center"><a href="http://twitter.com/fpgablog">Twitter @fpgablog</a> : : <a href="http://embeddedstar.tradepub.com/">Free Trade Publications</a> : : <a href="http://www.embeddedstar.com/careers/">Jobs</a> : : <a href="http://fpgablog.com/">FPGA Blog</a> : : <a href="http://edablog.com/">EDA Blog</a> : : <a href="http://www.embeddedstar.com/">Embedded Star</a> : : <a href="http://edageek.com/">EDA Geek</a> : : <a href="http://daddyforever.com/">Dad Blog</a><br />© 2011 <a href="http://www.onlinedestiny.com/">Online Destiny Ltd</a> : : FPGA Blog is a trademark of Online Destiny Ltd</p>]]></content:encoded>
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		<item>
		<title>Altera Workshops and Demonstrations at SPS/IPC/DRIVES 2011</title>
		<link>http://fpgablog.com/posts/electric-automation-conference/</link>
		<comments>http://fpgablog.com/posts/electric-automation-conference/#comments</comments>
		<pubDate>Fri, 04 Nov 2011 15:49:32 +0000</pubDate>
		<dc:creator>Ken Cheung</dc:creator>
				<category><![CDATA[Event]]></category>
		<category><![CDATA[altera]]></category>
		<category><![CDATA[Conference]]></category>
		<category><![CDATA[Demonstrations]]></category>
		<category><![CDATA[Electric Automation]]></category>
		<category><![CDATA[Exhibition]]></category>
		<category><![CDATA[SPS/IPC/DRIVES 2011]]></category>
		<category><![CDATA[Workshops]]></category>

		<guid isPermaLink="false">http://fpgablog.com/?p=3432</guid>
		<description><![CDATA[Altera will showcase their industrial embedded solutions for energy-efficient and safety-integrated drive systems at SPS/IPC/DRIVES Electric Automation Exhibition and Conference. Altera will show how their Cyclone FPGA devices enable industrial systems like drive systems with a high-performance control loop in floating point. The event will take November 22-24 in Nuremberg, Germany. Read more Altera Workshops [...]]]></description>
			<content:encoded><![CDATA[<p>Altera will showcase their industrial embedded solutions for energy-efficient and safety-integrated drive systems at SPS/IPC/DRIVES Electric Automation Exhibition and Conference. Altera will show how their Cyclone FPGA devices enable industrial systems like drive systems with a high-performance control loop in floating point. The event will take November 22-24 in Nuremberg, Germany.</p>
<p><p>Read more <a href="http://fpgablog.com/posts/electric-automation-conference/">Altera Workshops and Demonstrations at SPS/IPC/DRIVES 2011</a></p><p align="center"><a href="http://api.tweetmeme.com/share?url=http://fpgablog.com/posts/electric-automation-conference/"><img src="http://api.tweetmeme.com/imagebutton.gif?url=http://fpgablog.com/posts/electric-automation-conference/" height="61" width="51" /></a></p>
<p align="center"><a href="http://twitter.com/fpgablog">Twitter @fpgablog</a> : : <a href="http://embeddedstar.tradepub.com/">Free Trade Publications</a> : : <a href="http://www.embeddedstar.com/careers/">Jobs</a> : : <a href="http://fpgablog.com/">FPGA Blog</a> : : <a href="http://edablog.com/">EDA Blog</a> : : <a href="http://www.embeddedstar.com/">Embedded Star</a> : : <a href="http://edageek.com/">EDA Geek</a> : : <a href="http://daddyforever.com/">Dad Blog</a><br />© 2011 <a href="http://www.onlinedestiny.com/">Online Destiny Ltd</a> : : FPGA Blog is a trademark of Online Destiny Ltd</p>]]></content:encoded>
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		<item>
		<title>Xilinx to Present and Demonstrate at ARM TechCon 2011</title>
		<link>http://fpgablog.com/posts/zynq-7000-conference/</link>
		<comments>http://fpgablog.com/posts/zynq-7000-conference/#comments</comments>
		<pubDate>Fri, 21 Oct 2011 16:03:23 +0000</pubDate>
		<dc:creator>Ken Cheung</dc:creator>
				<category><![CDATA[Event]]></category>
		<category><![CDATA[ARM TechCon]]></category>
		<category><![CDATA[Conference]]></category>
		<category><![CDATA[technical papers]]></category>
		<category><![CDATA[Xilinx]]></category>
		<category><![CDATA[Zynq-7000 EPP]]></category>

		<guid isPermaLink="false">http://fpgablog.com/?p=3382</guid>
		<description><![CDATA[Xilinx will take part in the ARM TechCon 2011 conference. At the event, Xilinx will present technical papers and demonstrate their Zynq-7000 EPP Emulation Platform. ARM TechCon 2011 will take place in Santa Clara, California from October 25-27 at the Santa Clara Convention Center. Xilinx will be in booth #207. ARM TechCon is an event [...]]]></description>
			<content:encoded><![CDATA[<p>Xilinx will take part in the ARM TechCon 2011 conference. At the event, Xilinx will present technical papers and demonstrate their Zynq-7000 EPP Emulation Platform. ARM TechCon 2011 will take place in Santa Clara, California from October 25-27 at the Santa Clara Convention Center. Xilinx will be in booth #207. ARM TechCon is an event for connecting, instructing, advising and enabling the world of electronic and computer design.</p>
<p><p>Read more <a href="http://fpgablog.com/posts/zynq-7000-conference/">Xilinx to Present and Demonstrate at ARM TechCon 2011</a></p><p align="center"><a href="http://api.tweetmeme.com/share?url=http://fpgablog.com/posts/zynq-7000-conference/"><img src="http://api.tweetmeme.com/imagebutton.gif?url=http://fpgablog.com/posts/zynq-7000-conference/" height="61" width="51" /></a></p>
<p align="center"><a href="http://twitter.com/fpgablog">Twitter @fpgablog</a> : : <a href="http://embeddedstar.tradepub.com/">Free Trade Publications</a> : : <a href="http://www.embeddedstar.com/careers/">Jobs</a> : : <a href="http://fpgablog.com/">FPGA Blog</a> : : <a href="http://edablog.com/">EDA Blog</a> : : <a href="http://www.embeddedstar.com/">Embedded Star</a> : : <a href="http://edageek.com/">EDA Geek</a> : : <a href="http://daddyforever.com/">Dad Blog</a><br />© 2011 <a href="http://www.onlinedestiny.com/">Online Destiny Ltd</a> : : FPGA Blog is a trademark of Online Destiny Ltd</p>]]></content:encoded>
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		<item>
		<title>Webinar: Introduction to FPGA Design Using MATLAB and Simulink</title>
		<link>http://fpgablog.com/posts/mathworks-altera-webcast/</link>
		<comments>http://fpgablog.com/posts/mathworks-altera-webcast/#comments</comments>
		<pubDate>Wed, 28 Sep 2011 16:21:03 +0000</pubDate>
		<dc:creator>Ken Cheung</dc:creator>
				<category><![CDATA[Event]]></category>
		<category><![CDATA[altera]]></category>
		<category><![CDATA[FPGA Design]]></category>
		<category><![CDATA[MathWorks]]></category>
		<category><![CDATA[MATLAB]]></category>
		<category><![CDATA[Simulink]]></category>
		<category><![CDATA[webcast]]></category>
		<category><![CDATA[webinar]]></category>

		<guid isPermaLink="false">http://fpgablog.com/?p=3329</guid>
		<description><![CDATA[MathWorks and Altera are offering a webinar about how to reduce FPGA design cycle time by 33-50% by adopting workflows based on MATLAB and Simulink. The webcast will demonstrate how MATLAB and Simulink are used to design FPGAs for applications such as signal processing, image processing, communications, and control systems. The Introduction to FPGA Design [...]]]></description>
			<content:encoded><![CDATA[<p>MathWorks and Altera are offering a webinar about how to reduce FPGA design cycle time by 33-50% by adopting workflows based on MATLAB and Simulink. The webcast will demonstrate how MATLAB and Simulink are used to design FPGAs for applications such as signal processing, image processing, communications, and control systems. The Introduction to FPGA Design Using MATLAB and Simulink webinar will take place October 5th. The online event will take place at two different times: 6:00 AM and 11:00 AM PDT.</p>
<p><p>Read more <a href="http://fpgablog.com/posts/mathworks-altera-webcast/">Webinar: Introduction to FPGA Design Using MATLAB and Simulink</a></p><p align="center"><a href="http://api.tweetmeme.com/share?url=http://fpgablog.com/posts/mathworks-altera-webcast/"><img src="http://api.tweetmeme.com/imagebutton.gif?url=http://fpgablog.com/posts/mathworks-altera-webcast/" height="61" width="51" /></a></p>
<p align="center"><a href="http://twitter.com/fpgablog">Twitter @fpgablog</a> : : <a href="http://embeddedstar.tradepub.com/">Free Trade Publications</a> : : <a href="http://www.embeddedstar.com/careers/">Jobs</a> : : <a href="http://fpgablog.com/">FPGA Blog</a> : : <a href="http://edablog.com/">EDA Blog</a> : : <a href="http://www.embeddedstar.com/">Embedded Star</a> : : <a href="http://edageek.com/">EDA Geek</a> : : <a href="http://daddyforever.com/">Dad Blog</a><br />© 2011 <a href="http://www.onlinedestiny.com/">Online Destiny Ltd</a> : : FPGA Blog is a trademark of Online Destiny Ltd</p>]]></content:encoded>
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		</item>
		<item>
		<title>DSP for FPGAs Technical Course</title>
		<link>http://fpgablog.com/posts/dsp-fpga-de-uk/</link>
		<comments>http://fpgablog.com/posts/dsp-fpga-de-uk/#comments</comments>
		<pubDate>Wed, 14 Sep 2011 15:22:30 +0000</pubDate>
		<dc:creator>Ken Cheung</dc:creator>
				<category><![CDATA[Event]]></category>
		<category><![CDATA[DSP]]></category>
		<category><![CDATA[field programmable gate arrays]]></category>
		<category><![CDATA[FPGAs]]></category>
		<category><![CDATA[qaqadu event gmbh]]></category>
		<category><![CDATA[Technical Course]]></category>

		<guid isPermaLink="false">http://fpgablog.com/?p=3300</guid>
		<description><![CDATA[qaqadu event gmbh is offering a DSP for FPGAs technical course. The three-day class will cover the use of FPGA devices for DSP algorithms, applications and architectures. The course will present theory, algorithms, design techniques and actual practicalities of the implementation of DSP algorithms and digital communications architectures using Field Programmable Gate Array technology. The [...]]]></description>
			<content:encoded><![CDATA[<p>qaqadu event gmbh is offering a DSP for FPGAs technical course. The three-day class will cover the use of FPGA devices for DSP algorithms, applications and architectures. The course will present theory, algorithms, design techniques and actual practicalities of the implementation of DSP algorithms and digital communications architectures using Field Programmable Gate Array technology. The DSP for FPGAs class will take place October 18-20 in Munich, Germany and November 15-17 in Scotland, UK.</p>
<p><p>Read more <a href="http://fpgablog.com/posts/dsp-fpga-de-uk/">DSP for FPGAs Technical Course</a></p><p align="center"><a href="http://api.tweetmeme.com/share?url=http://fpgablog.com/posts/dsp-fpga-de-uk/"><img src="http://api.tweetmeme.com/imagebutton.gif?url=http://fpgablog.com/posts/dsp-fpga-de-uk/" height="61" width="51" /></a></p>
<p align="center"><a href="http://twitter.com/fpgablog">Twitter @fpgablog</a> : : <a href="http://embeddedstar.tradepub.com/">Free Trade Publications</a> : : <a href="http://www.embeddedstar.com/careers/">Jobs</a> : : <a href="http://fpgablog.com/">FPGA Blog</a> : : <a href="http://edablog.com/">EDA Blog</a> : : <a href="http://www.embeddedstar.com/">Embedded Star</a> : : <a href="http://edageek.com/">EDA Geek</a> : : <a href="http://daddyforever.com/">Dad Blog</a><br />© 2011 <a href="http://www.onlinedestiny.com/">Online Destiny Ltd</a> : : FPGA Blog is a trademark of Online Destiny Ltd</p>]]></content:encoded>
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		</item>
		<item>
		<title>Lattice Semiconductor Power 2 You Seminars</title>
		<link>http://fpgablog.com/posts/power-manager-ii/</link>
		<comments>http://fpgablog.com/posts/power-manager-ii/#comments</comments>
		<pubDate>Mon, 12 Sep 2011 15:29:58 +0000</pubDate>
		<dc:creator>Ken Cheung</dc:creator>
				<category><![CDATA[Event]]></category>
		<category><![CDATA[Lattice Semiconductor]]></category>
		<category><![CDATA[Platform Management]]></category>
		<category><![CDATA[Power]]></category>
		<category><![CDATA[Power Manager II]]></category>
		<category><![CDATA[seminars]]></category>

		<guid isPermaLink="false">http://fpgablog.com/?p=3294</guid>
		<description><![CDATA[Lattice Semiconductor will host a series of Power 2 You seminars. The worldwide Power 2 You Seminar Series will include comprehensive practical and technical presentations that combine basic design principles, advanced programmable power and platform management concepts, and real-world power and platform management application examples. Lattice also announced a 50% price reduction on their Power [...]]]></description>
			<content:encoded><![CDATA[<p>Lattice Semiconductor will host a series of Power 2 You seminars. The worldwide Power 2 You Seminar Series will include comprehensive practical and technical presentations that combine basic design principles, advanced programmable power and platform management concepts, and real-world power and platform management application examples. Lattice also announced a 50% price reduction on their Power Manager II evaluation boards.</p>
<p><p>Read more <a href="http://fpgablog.com/posts/power-manager-ii/">Lattice Semiconductor Power 2 You Seminars</a></p><p align="center"><a href="http://api.tweetmeme.com/share?url=http://fpgablog.com/posts/power-manager-ii/"><img src="http://api.tweetmeme.com/imagebutton.gif?url=http://fpgablog.com/posts/power-manager-ii/" height="61" width="51" /></a></p>
<p align="center"><a href="http://twitter.com/fpgablog">Twitter @fpgablog</a> : : <a href="http://embeddedstar.tradepub.com/">Free Trade Publications</a> : : <a href="http://www.embeddedstar.com/careers/">Jobs</a> : : <a href="http://fpgablog.com/">FPGA Blog</a> : : <a href="http://edablog.com/">EDA Blog</a> : : <a href="http://www.embeddedstar.com/">Embedded Star</a> : : <a href="http://edageek.com/">EDA Geek</a> : : <a href="http://daddyforever.com/">Dad Blog</a><br />© 2011 <a href="http://www.onlinedestiny.com/">Online Destiny Ltd</a> : : FPGA Blog is a trademark of Online Destiny Ltd</p>]]></content:encoded>
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		<slash:comments>0</slash:comments>
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