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Lattice MachXO PLD .8mm Pitch Chip Array BGA Package

Posted by Ken Cheung in FPGA on Monday, June 29, 2009
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Lattice Semiconductor introduced a 0.8-mm pitch 256-pin Chip-Array BGA (caBGA256) package for its MachXO PLD family. The Mach XO640, XO1200, and XO2280 devices are now available in the 14 x 14 mm, caBGA256 package with up to 211 user I/O. The new packages provide designers with 10% lower cost and 30% reduction in board area than previously available on 1.0-mm pitch 256-pin Fine-Pitch Thin BGA (ftBGA256) packages. The new MachXO640, XO1200 and XO2280 caBGA256 device packages are supported in Lattice’s ispLEVER version 7.2, Service Pack 2 software. Production devices of the Mach XO640, XO1200, and XO2280 in the caBGA256 package are available now. Volume pricing for the Mach XO640 caBGA256 is $2.75 in 250,000 unit volumes.

More information: Lattice MachXO Reconfigurable Programmable Logic Devices

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