Avnet Electronics Marketing and Xilinx are co-hosting X-fest 2012, which is a series of free, day-long seminars in North America, Europe, Asia and Japan. X-fest 2012 features twelve technical courses based on Xilinx’s new Artix-7, Kintex-7 and Virtex-7 FPGAs, and Zynq-7000 Extensible Processing Platform (EPP) family. The global event will also include hands-on demonstrations from Analog Devices, Cypress, Freescale Semiconductor, Maxim, Micron Technology, TE Connectivity, and Texas Instruments (TI). X-fest 2012 will take place in 22 cities around the world.
X-fest 2012 Topics
Designing with the Xilinx 7 Series PCIe Embedded Block
This course introduces designers to the PCIe block embedded in the Xilinx 7 series FPGAs. Engineers will learn the basic building blocks of the 7 series PCIe embedded block as well as how to attach a DMA controller to the backend of the PCIe core. In addition, attendees will see how to configure the FPGA in a PCIe system using Partial Reconfiguration in order to meet the PCIe Endpoint device Enumeration-Ready time.
High Performance Clocking with the Xilinx 7 Series
Successful clocking of high performance designs requires a system-level approach. This course begins by identifying the challenges and provides guidance for selecting external clock generation devices for FPGA designs. However, the designer’s job is only half done at this point. The course continues by taking you inside the Xilinx 7 series FPGA clocking resources, including the Mixed-Mode Clock Managers, PLLs, BUFx clock buffers, and the new Multi-Region BUFMR. Several real-world designs will be explored to illustrate the concepts.
Optimal Memory Interface Design with Xilinx 7 Series
Xilinx 7 series FPGAs support multiple memory types, one of which is DDR3. The 7 series makes use of hardened PHY elements and soft fabric controllers to achieve up to 1866 Mbps performance and up to 72-bit wide data paths. Furthermore, 7 series families have a unified architecture, meaning the memory controller for Artix-7 has the same interface as the one for Kintex-7 or Virtex-7. This course looks at the 7 series memory controllers offered by Xilinx, with a focus on DDR3 solutions. A practical example is used to examine best practices for optimizing the memory bandwidth and realistically achievable throughput. Recommendations for choosing the right memory for the application will be given based on design criteria such as cost, size, latency, bandwidth, and ease of use.
Powering Xilinx 7 Series FPGAs
The new 7 series FPGAs from Xilinx are fabricated on a high-performance, low-power (HLP) 28nm process, which offers improved power savings over the previous generation of FPGAs. Part of this power improvement comes from the lowering of voltage requirements for the various banks within the FPGA. Yet, to obtain the high levels of performance, special care must be taken to design high performance power solutions with voltage accuracy specifications of 3% or better. This course details the power needs of the 7-Series FPGAs, reviewing voltage, tolerance and start-up sequencing requirements. The challenges of low voltage, high current systems and more will be addressed to help guide the development of robust 7 series compatible power systems. Architectural innovations and features for power reduction across the dimensions of static power, dynamic power, and I/O power will also be discussed.
Designing High Pixel-Rate Video Systems with Xilinx FPGAs
As video systems continue to push towards higher resolution, faster frame rates, and more advanced image processing and analytics, the need for FPGA-based solutions continues to expand. This class focuses on the techniques and IP involved in designing systems using high frame rate, multi-gigabit pixel-rate cameras with the latest generation Xilinx 7 series and Zynq-7000 family of FPGAs. From image capture using the FPGA’s flexible I/O, to the image processing pipeline and video frame buffer using the Xilinx Video IP, this class provides a comprehensive overview of creating video systems with the newest Xilinx devices, tools and IP portfolio.
Designing Wireless Communication Systems in Xilinx FPGAs
Xilinx 7 series and Zynq-7000 FPGAs offer unprecedented resources for digital signal processing, accompanied by development tools, IP and support to accelerate high-performance wireless communication system design. This course explores the latest developments in Xilinx DSP, based on the Zynq-7000 Software-Defined Radio Kit. Design techniques for FPGA-based digital front-ends tightly coupled to latest generation high-speed analog data converters will be presented within system-level design flows for DSP, including Matlab/Simulink and high-level C-Synthesis tools.
FPGA-Based Motor Control
Intelligent motor control is finding applications in industrial automation, consumer electronics, medical diagnostics and robotics.In response, designers require complex motor control algorithms, increased efficiency, and custom safety features, often exhausting performance of traditional MCUs.The Xilinx 7 series and Zynq-7000 series of FPGAs ideally address these markets with embedded analog-to-digital converters, microcontrollers and high-performance DSP capability.This course introduces students to FPGA-based motor control, discussing the Xilinx 7 series FPGA features and IP that place high performance, synchronous control of multiple motors, network communications and peripheral integration into a single device.
Sampling and Processing Real-World Data with Xilinx 7 Series FPGAs
Lower speed, higher resolution analog-to-digital converters (ADCs) and digital-to-analog converters (DACs) typically don’t require an FPGA for interface support or control. Yet, using an FPGA to control newer digitally controlled Analog Front-Ends (AFEs) can increase a design’s flexibility and improve in-system diagnostics. The FPGA can also be used to perform linearization, filtering and DC balancing to improve data conversion resolution. This course will explore both the new XADC analog-to-digital converter component in the 7 series FPGAs as well as low and medium speed discrete ADC’s and DACs, showing applications and techniques for boosting system performance.
ARM Software Development for Zynq-7000
This course introduces designers to ARM software development specific to the Zynq-7000 platform and discusses the operating system options that are available in today’s market. Concepts and methodologies employed in software development based on the ARM dual-core Cortex-A9 MPCore included in the Zynq-7000 family are thoroughly discussed. Architectural support for high-level languages, systems development, operating systems, and an overview of the Software Developer Kit (SDK) tool are explored.
Introduction to the Zynq-7000 Extensible Processing Platform
The Zynq-7000 is a new class of product, combining an industry-standard ARM dual-core Cortex-A9 MPCore processing system with the unified architecture of Xilinx 28nm programmable logic. This processor-centric architecture offers the flexibility and scalability of an FPGA combined with ASIC-like performance and power and the ease of use of an ASSP. This course introduces hardware and software engineers to the Xilinx Zynq-7000 device architecture and development tools. Additionally, several example designs will be provided to show how the Zynq-7000 device can be used in a variety of system solutions.
Software Acceleration in Zynq-7000
With the combination of a fixed ARM dual-core Cortex A9 MPCore and an array of programmable logic gates, the Zynq-7000 platform offers designers the unique ability to create custom co-processors or accelerators to improve system performance verses a pure software implementation.This course introduces engineers to the hardware acceleration feature in the Xilinx Zynq-7000 architecture. Students will learn how to use the Accelerator Coherency Port (ACP) to implement hardware accelerators in the programmable logic section of the Zynq-7000 platform and maintain coherency between the processor and the programmable logic system.
Zynq-7000 in Action: Exploring the Low Cost ZED Kit
Both software and hardware designers will find the low-cost Zynq-7020 Evaluation and Development (ZED) Kit an ideal starting point for exploring the unique features of the Zynq-7000 EPP architecture. This course provides an overview of what’s included in the kit and available publicly for this community-style board. A brief hardware overview of the Z7020-based platform highlights both the Processor System (PS) and Programmable Logic (PL) elements made available on the board. Reference designs and training materials covering both software and hardware that are available on the community website are described. As a case study, the course examines configuring and booting the ARM processing system and running a Linux application communicating with a PL-based video output and a PS-based HID peripheral.
More info: X-fest 2012