Xilinx On-Ramp Technical Sessions

Avnet Electronics Marketing is offering five new On-Ramp Technical Sessions(tm) that features solutions from Xilinx® programmable logic. On-Ramp Technical Sessions are live presentations and demonstrations that are free of charge for qualified Avnet customers. Xilinx On-Ramp Technical Sessions take palce at the customer’s location. Most sessions last between one and two hours.

Highlights

  • Customers can self-select On-Ramp sessions based on interest
  • On-Ramp presentation tailored to customers needs
  • Presentation opportunities for technical discussions about a specific application
  • Demonstrations of tools related to the solution are presented
  • On-Ramp sessions are scheduled at the customer’s convenience

On-Ramp Topics

  • Peripheral Component Interconnect Express (PCIe)
    PCIe is a computer expansion card interface platform designed to accelerate and enable full information transfer from the motherboard to the card without the use of additional hardware. Benefits of PCIe include accelerated file transfer and lower design and implementation costs.
  • Fibre Channel
    Fibre Channel is a gigabit-speed network technology that has become the standard connection type for storage area networks (SAN) in enterprise storage. Demonstration includes using a Xilinx Core Generator to configure a Virtex-4 FX multi-gigabit transceiver (MGT) for Fibre Channel applications. Virtex-4 FX MGTs offer designers the ideal debug solution for server, storage sub-system, communication line card and backplane applications.
  • Spartan(tm)-3A Configuration
    As the leading connectivity platform and industry’s first anti-cloning security technology, Spartan-3A enhances flexible power management and enables cost effective design. Various application configuration options are demonstrated – including byte parallel interface (BPI), serial peripheral interface (SPI), and advantages and applications for multi-boot.
  • Virtex(tm)-5 GTP Reference Design
    This On-Ramp shows how the Aurora protocol can be implemented on the Virtex-5 GTP transceivers – a fourth generation multi-gigabit transceiver technology. An overview of the Aurora LogiCORE(tm) is also presented, covering user interface, flow control, clocking and initialization.
  • Embedded Development Kit (EDK) 9.2 Demo for Spartan-E3 Starter Kit
    EDK 9.2 provides a low-cost, easy to use development and evaluation platform for Spartan-3 field-programmable gate array (FPGA) designs. Demonstration includes the creation of a new MicroBlaze hardware platform from Xilinx Platform Studio (XPS) Base System Builder and highlights test applications run on the Spartan-3E Starter Board.

More info: Avnet On-Ramp Technical Sessions