Xilinx is opening their platform and supporting FPGA industry standards. As part of their effort, Xilinx is making it easier for FPGA users to quickly find the right Xilinx Alliance Program partner for their specific design and development needs. Xilinx Alliance Program Members offers flexibility and cost of ownership benefits, while lowering design risks, over ASSP and ASIC solutions. The companies span many markets — such as IP, design and integration services, embedded software, design tools, development and evaluation boards, and complimentary silicon device technology.
Xilinx is adopting several industry standards and opening up its own platforms to better enable Alliance Program members to provide ‘plug and play’ FPGA design solutions. Xilinx is also establishing standard business terms for licensing of IP and design services, investing in the ecosystem to accelerate availability of optimized IP and Targeted Design Platforms, and piloting new business models to provide engineers more choices to engage with Alliance Program members.
Xilinx will use the AMBA AXI4 protocol as the single, open, on-chip interconnect standard to streamline IP development and reduce IP integration time and effort. This combined with the unified architecture across device families in the 28nm 7 series FPGAs will also improve IP portability and designer productivity. With the availability of ISE Design Suite 12.3, the first of these AXI protocol-enabled IP cores are now available including initial support by Alliance Members.
Xilinx is opening up its ISE Design Suite CORE Generator System and standardizing on the IEEE 1685 IP-XACT standard defined by the SPIRIT Consortium to automate the packaging, delivery, and configuration of IP. Xilinx is also supporting the IEEE P1735 IP encryption standard and FlexNet licensing to improve interoperability and access to advanced SoC design tools and methodologies to optimize the FPGA design flow; and is driving industry-standard business terms to streamline licensing of IP and design services through the SignOnce IP License, the industry’s first and only set of common license terms for programmable logic soft IP cores. Xilinx has also adopted the VITA-57 FMC (FPGA Mezzanine card) standard for add-on cards in order to improve the scalability of development boards using Xilinx FPGAs.
Xilinx is improving the qualification process for Alliance Members and has created Premier and technical certified tier of membership. Premier Members are top-tier Alliance Members who have passed a 320 point on-site audit from Xilinx covering business processes, technical competency, product quality, and supportability, and maintain certified design expertise on Xilinx FPGAs. They work closely with Xilinx to align development roadmaps and proactively provide optimized support for the latest silicon and design tools. Certified Members pass a review of their technical, business, quality, and support processes and have engineers who have passed the same rigorous training on FPGA design used by Xilinx Field Engineering worldwide. Xilinx certified Member engineers annually refresh Certification training to ensure they have updated their expertise on the latest products and technologies from Xilinx.
More information: Xilinx Alliance Program