Today, Altera introduced their low-cost Arria GX family for the transceiver-based FPGA market. Arria GX FPGAs are optimized to support PCI Express (PCIe), Gigabit Ethernet (GbE), and Serial RapidIO(TM) (SRIO) standards up to 2.5 Gbps. Features of the Arria GX family include the proven Stratix II GX transceiver technology, flip-chip packages for superior signal integrity, software tools, and verified intellectual property (IP) cores.
The Arria GX family is comprised of five devices ranging in density from 21,580 to 90,220 logic elements (LEs), up to 4.5 Mbits of embedded memory and up to 176 multipliers, and is built on TSMC’s established 90-nm process. The family addresses the rapidly growing need for low-cost FPGAs with transceivers in the communications, computer, storage and industrial markets.
Arria GX FPGAs provide up to 12 full-duplex transceiver channels optimized to implement the PCIe, GbE and SRIO protocols. These transceivers are based on the same technology that has demonstrated its success in the high-end Stratix II GX family. The devices utilize flip-chip packaging technology, which provides a significant signal integrity advantage over wire-bond packages when combining transceivers with advanced memory interfaces.
The first production-qualified Arria GX devices will begin shipping in June. The EP1AGX50CF484C6 device will be priced at $50 (US) in 25K unit volume. All Arria GX devices will be shipping in production by September 2007. The Arria GX Development Kit is currently available.