Altera Arria II GX FPGA Development Kit

Altera launched the Arria II GX FPGA Development Kit. The Arria kit features hardware and software resources that enable customers to rapidly evaluate and use Arria II GX devices for implementing high-performance digital functions in communications, broadcast, computer and storage, test and measurement, medical, and military applications. The RoHS compliant Arria II GX FPGA Development Kit is currently available and priced at $1,495.

Arria II GX FPGA Development Kit

  • Arria II GX EP2AGX125EF35 FPGA in the 1152-pin fine pitch BGA package
  • Max II EPM2210F256 CPLD in the 256-pin Fine Pitch BGA Package
  • HSMC expansion port
  • Gigabit Ethernet port
  • 128-MB 16-bit DDR3 device
  • 1-GB 64-bit DDR2 SODIMM
  • 2-MB SSRAM
  • 64-MB flash
  • MAX II CPLD and flash fast passive parallel configuration
  • On-board USB-Blaster circuitry using the Quartus II programme
  • Four on-board oscillators
  • SMA connectors for external LVPECL clock input
  • SMA connector for clock output
  • Four user LEDs
  • Two-line character LCD display
  • Configuration-done LED
  • HSMC interface transmit/receive LED (Tx/Rx)
  • Three PCI Express LEDs
  • Five Ethernet LEDs
  • User reset (CPU reset) push-button
  • MAX II CPLD reset push-button
  • Load image (program FPGA from flash) push-button
  • Image select (select image to load from flash) push-button
  • Two general user push-buttons
  • Four user DIP switches
  • Eight MAX II device control DIP switches
  • Arria II GX FPGA Development Kit CD-ROM
  • Altera’s complete Design Suite DVD
  • Power adaptor and cables

The Arria II GX FPGA Development Kit reduces development time by providing a complete system of pre-verified components and supporting hardware reference designs. The Arria II GX FPGA Development Kit includes a development board featuring an Arria II GX (EP2AGX125EF35) FPGA with twelve transceivers, a one-year license for Quartus II Design Software, Development Kit Edition and access to Altera’s MegaCore IP library including the Nios II Embedded Design Suite.

The development kit offers an entire PCI Express (PCIe) Gen1 end-point design package, featuring a PCI-SIG-compliant Arria II GX FPGA-based development board with an embedded PCIe Gen1 hard intellectual property (IP) core. A wide range of development resources are available on the Altera website, including free PCIe training, PCIe, Gigabit Ethernet (GbE) and SDI-based reference designs to help designers get up-to-speed quickly, and a database of over 20 readily available mezzanine cards to address specific application and market needs.

More information: Altera