FPGA Blog - field programmable gate array and structured asic

Share/BookmarkSubscribe

Xilinx Debuts Defense-Grade FPGAs, Zynq-7000 SoCs with 4G Secure Architecture

Posted by Ken Cheung in FPGA on Thursday, November 1, 2012

Xilinx Defense-Grade 7 Series FPGAs and Zynq-7000 All Programmable SoCs with Fourth Generation Secure Capabilities

Xilinx introduced their fourth generation secure architecture with Information Assurance and Anti-Tamper IP core support for defense-grade 7 series FPGA devices and Zynq-7000 All Programmable system-on-chips. In addition to the secure capabilities, the defense-grade 7 series FPGAs and Zynq-7000 All Programmable SoCs offer mask set control, ruggedized packaging with fully-leaded (Pb) content for harsh environmental operation, full extended temperature range testing, long term availability and anti-counterfeiting features.

The basis for Xilinx’s fail safe heritage is the combination of Xilinx’s fourth generation secure silicon, Information Assurance methodology and DoD 5000 Series compliant Anti-Tamper Security Monitor IP core (SECMON). The fail safe heritage removes any single point of failure in systems that may compromise a mission, which is a key attribute in assuring secure applications functionality.

The high reliability, defense-grade devices reduce the risk and cost of deploying the latest Aerospace and Defense (A&D) systems by utilizing off-the-shelf reprogrammable Xilinx FPGAs and SoCs. All devices are manufactured with 28nm process technology, and are optimized for high performance and the lowest total power. Xilinx defense-grade products are fully pin-compatible to commercial-grade equivalents for low cost prototyping and are offered off-the-shelf.

The Xilinx All Programmable families of defense-grade FPGAs and SoCs are available in I-temperature (-40 degrees to +100 degrees C), Q-temperature (-40 degrees to +125 degrees C) and M-temperature (-55 degrees to +125 degrees C). The devices will be in production in the first quarter of next year.

More info: Xilinx Aerospace and Defense FPGA and SOC Devices

Related Posts with Thumbnails

Custom Search

FPGA Blog Newsletter
Don't have time to visit FPGA Blog everyday? Then sign up for our free newsletter. We'll send you an email when we have something to share with you. Your email address will be kept confidential and we will not share, sell, or rent it to anyone. You can unsubscribe at any time by clicking a link in the email.

Enter your email address to sign up for our free newsletter:  

If you are familiar with RSS feeds, you can also sign up for our free blog feed. Our RSS feed is updated in real-time while our newsletter is updated daily.