ADI AD9250 250 MSPS ADC Simplifies High-Speed Data Converter-to-FPGA Interconnect Design

Analog Devices AD9250 dual-channel, 14-bit, 250 MSPS, A/D converter

Analog Devices announced their AD9250 dual-channel, 14-bit, 250 MSPS, A/D converter. It supports the JEDEC JESD204B serial output data interface standard. The ADI AD9250 device features a simplified interface that is ideal for next-generation FPGA-based applications in software-defined radio and medical ultrasound. The 250 MSPS AD9250-250 is available now for $131.57. A 170 MSPS pin-compatible version (AD9250-170) is available for $72.49.

ADA AD9250 dual-channel, 14-bit, 250 MSPS, A/D converter block diagram

The AD9250 converter’s JESDB204 serial interface reduces the number of high-speed differential output data paths required from up to 28 to 2 per IC. Its Subclass 1 deterministic latency function is repeatable from power-up cycle to power-up cycle and across link re-synchronization events.

High-performance FPGA suppliers, such as Xilinx, have incorporated on-chip JESD204B SerDes (serializer/deserializer) ports into their latest generation products. This end-to-end seamless connectivity for the analog signal chain results in simplified PCB layout, rapid prototyping capability, and faster time-to-market.

The ADI AD9250 A/D converter is the first full JESD204B Subclass 1 deterministic latency at 250 MSPS. This functionality supports the precise synchronization of multiple data-conversion channels through a serial interface.

The AD9250 A/D converter’s serial interface implementation provides up to 5 Gbps over a 1 or 2 lane-capable link. Two serial lanes are used to support the full 250-MSPS, dual-A/D converter data rate, or a single lane can be used to support reduced sampling rates.

ADI AD9250 Dual-Channel 14-bit/ 250 MSPS A/D Converter Features

  • JESD204B coded serial digital output with Subclass 1 deterministic latency
  • Signal-to-noise ratio (SNR) = 70.6 dBFS at 185 MHz AIN and 250 MSPS
  • Spurious-free dynamic range (SFDR) = 88 dBc at 185 MHz AIN and 250 MSPS
  • IF sampling frequencies of up to 400 MHz
  • 95 dB channel isolation/crosstalk
  • Low power and small package size
  • Total power consumption: 711 mW at 250 MSPS
  • 1.8 V supply voltages
  • Integer 1-to-8 input clock divider
  • Sample rates of up to 250 MSPS
  • Internal analog-to-digital converter (ADC) voltage reference

More info: ADI AD9250 14-BitDual Analog-to-Digital Converter (pdf)