White Paper: Delivering the Right Power and Performance for 28nm High-End FPGAs
Altera published a white paper that explores how their innovations in power and performance continue to enable designers to create differentiating high-performance systems for their end customers. The article outlines the steps taken from process selection through tools and modeling to ensure that the high performance was supported with a competitive power footprint. The title of the Altera technical paper is Delivering the Right Power and Performance for 28nm High-End FPGAs.
Delivering the Right Power and Performance for 28nm High-End FPGAs White Paper
Altera realized that a one-size-fits-all approach would not effectively work for the 28 nm node. Because designers need the right devices for their targeted applications, Altera chose Taiwan Semiconductor Manufacturing Company (TSMC)’s 28 nm High Performance (28HP) process for their high-end FPGAs and the 28 nm Low Power (28LP) process for their low-cost and mid-range families.
After choosing the 28HP process for its Stratix V FPGAs, Altera made several development choices to reduce device power consumption. This white paper outlines the steps taken from process selection through tools and modeling to ensure that the high performance was supported with a competitive power footprint. Having the right devices and tools enables designers to achieve high performance with competitive power and to have accurate early power estimation for their designs.
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.The focus on balancing power and performance from device architecture definition through customer design delivers the highest possible performance and bandwidth at the lowest possible power and lower power compared to competitive 28 nm offerings. The capabilities of Stratix V FPGAs enable designers to deliver their systems with a measurable advantage.
White Paper: Delivering the Right Power and Performance for 28nm High-End FPGAs (pdf)
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