Today, Altera Corporation (NASDAQ:ALTR) announced their first quarter 2007 results. Altera posted sales of $304.9 million, down 4% from the fourth quarter of 2006 and up 4% from the first quarter of 2006. First quarter 2007 net income was $75.1 million, $0.21 per diluted share, compared with net income of $58.7 million, $0.16 per diluted share, in the first quarter of 2006. Altera will pay a quarterly cash dividend of $0.04 per share on June 1, 2007 to shareholders of record on May 10, 2007.
- More than 250 customers participated in Altera’s Cyclone III early access program and are already designing Cyclone III FPGAs into applications that target consumer, automotive, military, industrial and wireless communications markets. Cyclone III FPGAs deliver an unprecedented combination of power, functionality, and cost which enables them to penetrate applications not previously addressable by programmable logic. With a rich supply of logic, memory, and digital signal processing (DSP) capabilities, Cyclone III FPGAs offer a compelling alternative to conventional embedded processor or DSP solutions, as well as other applications requiring a specialized logic solution. Production-qualified Cyclone III devices will be available in August, continuing the leadership Altera established in the low-cost FPGA space with the introduction of the original Cyclone family in 2002.
- Altera’s software-based Nios(R) embedded processor series remains the industry’s most popular PLD soft core processor because it simplifies embedded processor development and offers best-in-class performance. Last year Altera introduced the Nios II C-to-H Hardware Acceleration Compiler (C2H Compiler), which appeals to a broader audience beyond the traditional FPGA designer. Using this tool, embedded software designers can, in one mouse click, eliminate performance bottlenecks in their code by offloading software to a hardware accelerator. The Nios II C2H Compiler reduces development time from weeks to minutes and makes an Altera(R) solution readily available to software designers who would not previously have developed an FPGA-based solution. Altera recently won the EDN 2006 Innovation Award in the software category for the Nios II C2H Compiler, demonstrating the substantial benefit available to electronic design engineers through Altera’s Nios software. EDN Innovation Awards, which honor outstanding engineering products in the electronics industry, are the result of pre-selection by a panel of EDN technical editors and voting by EDN’s readers.
- Demonstrating the company’s extensive support for the fast-expanding Chinese market, Altera has opened its 30th joint laboratory and training center in China. These centers enable design engineering students to gain expertise in FPGA and structured ASIC design methodology. Like other Altera-sponsored centers, this newest center, at South China Normal University, is equipped with the latest Altera Quartus(R) II software and development kits enabling professors to conduct hands-on training with students. These efforts are part of the long-established Altera University Program. This program provides free software tools, devices, intellectual property cores, and ready-to-teach exercises and tutorials, as well as low-cost development and education boards, to more than 3,000 colleges and universities worldwide.