Xilinx Radiation Hardened Virtex-5QV FPGA Ready fo Space

Xilinx’s radiation-hardened space-grade Virtex-5QV FPGA is available in production with greater than 1Mrad(Si) Total Ionizing Dose (TID) capabilities. The radiation-hardened version of the commercial Xilinx Virtex-5 FPGA was developed under sponsorship by AFRL’s Space Vehicles Directorate. The FPGA is the first of its kind reprogrammable Single-Event-Upset (SEU) hardened FPGA specifically designed to withstand the harshest radiation environments. It supports the broadest range of space borne missions from low-earth orbit and beyond.

Virtex-5QV’s rad-hard features are backed by the highest levels of in-beam testing by the Xilinx Radiation Test Consortium (XRTC) and equivalent to millions of device years in space radiation environments. As a result, the Virtex-5QV protects against SEU, Total Immunity to Single-Event Latchup (SEL), high tolerance to TID, and data path protection from Single-Event Transients (SET).

Typical systems until now have either relied on one-time-programmable (OTP) solutions with reduced performance or long lead time, high non-recurring engineering (NRE) ASICs. Systems such as satellite communications networks, increased security for powerful defensive systems and new frontiers in space exploration will be within reach as a direct result of the unique combination of features that the Virtex-5QV FPGA provides.

Xilinx Space-Grade Virtex-5QV FPGA Features

  • Supports the broadest range of space borne missions from low-earth orbit and beyond
  • Reprogrammable Single-Event-Upset (SEU) hardened FPGA
  • Designed to withstand the harshest radiation environments
  • Enables design teams to reduce time-to-launch from years to months by using an off-the-shelf solution
  • Space systems that can be reprogrammed and updated even after launch
  • Rad-hard features are backed by the highest levels of in-beam testing by the Xilinx Radiation Test Consortium (XRTC)
  • Virtex-5QV FPGAs provide protection against SEU, Total Immunity to Single-Event Latchup (SEL), high tolerance to TID, and data path protection from Single-Event Transients (SET)
  • Configuration memory provides nearly 1,000 times the SEU hardness of the standard cell latches in the commercial device
  • Configuration control logic and the JTAG controller have been hardened with embedded triple module redundancy

More info: Xilinx Aerospace and Defense